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DM355SZCEA216 Scheda tecnica(PDF) 6 Page - Texas Instruments |
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DM355SZCEA216 Scheda tecnica(HTML) 6 Page - Texas Instruments |
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6 / 159 page  Contents TMS320DM355 Digital Media System-on-Chip (DMSoC) SPRS463F – SEPTEMBER 2007 – REVISED JANUARY 2009 www.ti.com 1 TMS320DM355 Digital Media System-on-Chip (Unless Otherwise Noted) .......................... 94 (DMSoC) ................................................... 1 4.2 Recommended Operating Conditions ............... 95 1.1 Features .............................................. 1 4.3 Electrical Characteristics Over Recommended Ranges of Supply Voltage and Operating Case 1.2 Description ............................................ 3 Temperature (Unless Otherwise Noted) ............ 96 1.3 Functional Block Diagram ............................ 5 5 DM355 Peripheral Information and Electrical 2 Device Overview ......................................... 7 Specifications ........................................... 97 2.1 Device Characteristics ................................ 7 5.1 Parameter Information Device-Specific Information 97 2.2 Memory Map Summary ............................... 8 5.2 Recommended Clock and Control Signal Transition 2.3 Pin Assignments .................................... 10 Behavior ............................................. 99 2.4 Pin Functions ........................................ 14 5.3 Power Supplies ...................................... 99 2.5 Pin List .............................................. 37 5.4 Reset ............................................... 101 2.6 Device Support ...................................... 56 5.5 Oscillators and Clocks ............................. 102 3 Detailed Device Description .......................... 60 5.6 General-Purpose Input/Output (GPIO) ............. 107 3.1 ARM Subsystem Overview .......................... 60 5.7 External Memory Interface (EMIF) ................. 109 3.2 ARM926EJ-S RISC CPU ............................ 61 5.8 MMC/SD ........................................... 116 3.3 Memory Mapping .................................... 63 5.9 Video Processing Sub-System (VPSS) Overview . 118 3.4 ARM Interrupt Controller (AINTC) ................... 64 5.10 USB 2.0 ............................................ 130 3.5 Device Clocking ..................................... 66 5.11 Universal Asynchronous Receiver/Transmitter (UART) ............................................. 132 3.6 PLL Controller (PLLC) ............................... 76 5.12 Serial Port Interface (SPI) .......................... 134 3.7 Power and Sleep Controller (PSC) .................. 80 5.13 Inter-Integrated Circuit (I2C) ....................... 137 3.8 System Control Module ............................. 80 5.14 Audio Serial Port (ASP) ............................ 140 3.9 Pin Multiplexing ...................................... 81 5.15 Timer ............................................... 148 3.10 Device Reset ........................................ 82 5.16 Pulse Width Modulator (PWM) ..................... 149 3.11 Default Device Configurations ....................... 83 5.17 Real Time Out (RTO) .............................. 151 3.12 Device Boot Modes ................................. 86 5.18 IEEE 1149.1 JTAG ................................ 152 3.13 Power Management ................................. 88 6 Revision History (Revision F) ...................... 155 3.14 64-Bit Crossbar Architecture ........................ 90 7 Mechanical Data ....................................... 156 3.15 MPEG4/JPEG Overview ............................ 93 7.1 Thermal Data for ZCE ............................. 156 4 Device Operating Conditions ........................ 94 7.1.1 Packaging Information ............................. 156 4.1 Absolute Maximum Ratings Over Operating Case Temperature Range Contents 6 Submit Documentation Feedback |
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