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74AVCH2T45DC Scheda tecnica(PDF) 4 Page - NXP Semiconductors |
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74AVCH2T45DC Scheda tecnica(HTML) 4 Page - NXP Semiconductors |
4 / 31 page 74AVCH2T45_3 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 03 — 6 May 2009 4 of 31 NXP Semiconductors 74AVCH2T45 Dual-bit, dual-supply voltage level translator/transceiver; 3-state 6.2 Pin description 7. Functional description [1] H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high-impedance OFF-state. [2] The input circuit of the data I/O is always active. [3] The DIR input circuit is referenced to VCC(A). [4] If at least one of VCC(A) or VCC(B) is at GND level, the device goes into suspend mode. Table 3. Pin description Symbol Pin Description VCC(A) 1 supply voltage port A and DIR 1A 2 data input or output 2A 3 data input or output GND 4 ground (0 V) DIR 5 direction control 2B 6 data input or output 1B 7 data input or output VCC(B) 8 supply voltage port B Table 4. Function table[1] Supply voltage Input Input/output[2] VCC(A), VCC(B) DIR[3] nA nB 0.8 V to 3.6 V L nA = nB input 0.8 V to 3.6 V H input nB = nA GND[4] XZ Z |
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