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74AUP1T98GM Scheda tecnica(PDF) 10 Page - NXP Semiconductors

Il numero della parte 74AUP1T98GM
Spiegazioni elettronici  Low-power configurable gate with voltage-level translator
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Produttore elettronici  NXP [NXP Semiconductors]
Homepage  http://www.nxp.com
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74AUP1T98_1
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 01 — 6 March 2008
10 of 17
NXP Semiconductors
74AUP1T98
Low-power configurable gate with voltage-level translator
12. Waveforms
Measurement points are given in Table 10.
VOL and VOH are typical output voltage levels that occur with the output load.
Fig 12. Input A, B and C to output Y propagation delay times.
Y output
A, B, C input
Y output
GND
VI
VOH
VOH
VOL
VOL
VM
VM
VM
VM
VM
VM
tPLH
tPLH
tPHL
tPHL
001aab593
Table 10.
Measurement points
Supply voltage
Output
Input
VCC
VM
VM
VI
tr = tf
2.3 V to 3.6 V
0.5
× VCC
0.5
× VI
1.65 V to 3.6 V
≤ 3.0 ns


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