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74AUP1T58GF Scheda tecnica(PDF) 11 Page - NXP Semiconductors

Il numero della parte 74AUP1T58GF
Spiegazioni elettronici  Low-power configurable gate with voltage-level translator
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Produttore elettronici  NXP [NXP Semiconductors]
Homepage  http://www.nxp.com
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74AUP1T58_2
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 02 — 29 September 2009
11 of 17
NXP Semiconductors
74AUP1T58
Low-power configurable gate with voltage-level translator
[1]
For measuring enable and disable times RL =5kΩ, for measuring propagation delays, setup and hold times and pulse width RL =1MΩ.
Test data is given in Table 11.
Definitions for test circuit:
RL = Load resistance.
CL = Load capacitance including jig and probe capacitance.
RT = Termination resistance should be equal to the output impedance Zo of the pulse generator.
VEXT = External voltage for measuring switching times.
Fig 13. Load circuitry for switching times
001aac521
DUT
RT
VI
VO
VEXT
VCC
RL
5 k
CL
G
Table 11.
Test data
Supply voltage
Load
VEXT
VCC
CL
RL[1]
tPLH, tPHL
tPZH, tPHZ
tPZL, tPLZ
2.3 V to 3.6 V
5 pF, 10 pF, 15 pF and 30 pF
5 k
Ω or 1 MΩ
open
GND
2
× VCC


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