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74AHC3GU04 Scheda tecnica(PDF) 3 Page - NXP Semiconductors |
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74AHC3GU04 Scheda tecnica(HTML) 3 Page - NXP Semiconductors |
3 / 15 page 74AHC3GU04_4 © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 04 — 7 January 2010 3 of 15 NXP Semiconductors 74AHC3GU04 Inverter 6.2 Pin description 7. Functional description 8. Limiting values [1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed. [2] For TSSOP8 package: above 55 °C the value of P tot derates linearly with 2.5 mW/K. For VSSOP8 package: above 110 °C the value of P tot derates linearly with 8 mW/K. For XSON8U package: above 45 °C the value of P tot derates linearly with 2.4 mW/K. Table 3. Pin description Symbol Pin Description 1A, 2A, 3A 1, 3, 6 data input GND 4 ground (0 V) 1Y, 2Y, 3Y 7, 5, 2 data output VCC 8 supply voltage Table 4. Function table H = HIGH voltage level; L = LOW voltage level Input Output A Y L H H L Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions Min Max Unit VCC supply voltage −0.5 +7.0 V VI input voltage −0.5 +7.0 V IIK input clamping current VI < −0.5 V [1] −20 - mA IOK output clamping current VO < −0.5 V or VO > VCC + 0.5 V [1] - ±20 mA IO output current −0.5 V < V O < VCC + 0.5 V - ±25 mA ICC supply current - 75 mA IGND ground current −75 - mA Tstg storage temperature −65 +150 °C Ptot total power dissipation Tamb = −40 °C to +125 °C [2] - 250 mW |
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