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SS8037H263GT72 Scheda tecnica(PDF) 7 Page - Silicon Standard Corp.

Il numero della parte SS8037H263GT72
Spiegazioni elettronici  Microprocessor Reset IC
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Produttore elettronici  SSC [Silicon Standard Corp.]
Homepage  http://www.siliconstandard.com
Logo SSC - Silicon Standard Corp.

SS8037H263GT72 Scheda tecnica(HTML) 7 Page - Silicon Standard Corp.

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PIN DESCRIPTION
PIN
NAME
FUNCTION
1
GND
Ground
(SS8037L/38L)
RESET Output remains low while VCC is below the reset threshold, and for at least 140ms after VCC
rises above the reset threshold.
2
RESET
(SS8037H)
RESET Output remains high while VCC is below the reset threshold, and for at least 140ms after VCC
rises above the reset threshold.
3
VCC
Supply Voltage (+5V, +3.3V, +3.0V)
APPLICATIONS INFORMATION
A microprocessor’s (µP’s) reset input starts the µP in a
known state. The SS8037L/H and 8038L assert reset
to prevent code-execution errors during power-up,
power-down, or brownout conditions. They assert a reset
signal whenever the VCC supply voltage declines below a
preset threshold, keeping it asserted for at least 140ms
after VCC has risen above the reset threshold. The
SS8038L
uses
an
open-drain
output,
and
the
SS8037L/37H have push-pull output stages. Connect a
pull-up resistor on the SS8308L’s RESET output to any
supply between 0 and 5.5V.
Figure 1. Maximum Transient Duration Without
Causing a Reset Pulse vs. Reset Compara-
tor Overdrive
Fig 2. RESET Valid to V CC = Ground Circuit
Negative-Going VCC Transients
In addition to issuing a reset to the µP during power-up,
power-down,
and
brownout
conditions,
the
SS8037L/H/8038L are relatively immune to short-
duration negative-going VCC transients (glitches).
Figure 1 shows typical transient duration vs. reset com-
parator overdrive, for which the SS8037L/H/8038L
do not generate a reset pulse. The graph was generated
using a negative-going pulse applied to VCC, starting 0.5V
above the actual reset threshold and ending below it by
the magnitude indicated (reset comparator overdrive).
The graph indicates the maximum pulse width a nega-
tive-going VCC transient can have without causing a reset
pulse. As the magnitude of the transient increases (goes
farther below the reset threshold), the maximum allow-
able pulse width decreases. Typically, for the SS803xx
463 and SS803xx438, a V CC transient that goes
100mV below the reset threshold and lasts 7µs or less
will not cause a reset pulse. A 0.1µF bypass capacitor
mounted as close as possible to the VCC pin provides
additional transient immunity.
Ensuring a Valid Reset Output Down to VCC = 0
When VCC falls below 1V, the SS8037 RESET output
no longer sinks current—it becomes an open circuit.
Therefore, high-impedance CMOS logic inputs con-
nected to RESET can drift to undetermined voltages.
This presents no problem in most applications since most
µP and other circuitry is inoperative with VCC below 1V.
However, in applications where RESET must be valid
down to 0V, adding a pull-down resistor to RESET
causes any stray leakage currents to flow to ground,
holding RESET low (Figure 2). R1’s value is not critical;
100k
Ω is large enough not to load RESET and small
enough to pull RESET to ground.
A 100k
Ω pull-up resistor to VCC is also recommended for
the SS8038L if RESET is required to remain valid for
VCC < 1V.
0
100
200
300
400
500
600
1
10
100
1000
Reset Comparator Overdrive, VTH- VCC (mV)
803xx308/293/263
803xx 463/438/400
V
CC
RESET
GND
R1
100k
V
CC
RESET
GND
SS8037
R1
100k
www.SiliconStandard.com
7 of 9
SS8037/8(G)
10/6/2004 Rev.2.20


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