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SS8014-29GTR Scheda tecnica(PDF) 9 Page - Silicon Standard Corp. |
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SS8014-29GTR Scheda tecnica(HTML) 9 Page - Silicon Standard Corp. |
9 / 10 page www.SiliconStandard.com 9 of 10 Layout Guide An input capacitance of ~1µF is required between the SS8014 input pin and ground (the amount of the ca- pacitance may be increased without limit), This ca- pacitor must be located a distance of not more than 1cm from the input and return to a clean analog ground. The input capacitor filters out the input voltage spike caused by the surge current due to the inductive effect of the package pin and the printed circuit board’s rout- ing wire. Otherwise, the actual voltage at the IN pin may exceed the absolute maximum rating. The output capacitor also must be located a distance of not more than 1cm from output to a clean analog ground, so that it can filter out the output spike caused by the surge current due to the inductive effect of the package pin and the printed circuit board’s rout- ing wire. Figure 5 is the SS8014 PCB recommended layout. Figure 4 Safe Operating Area Maximum Power Dissipation of SOT-23-5 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 25 35 45 55 65 75 85 95 105 115 125 Amibent Temperature T A (°C) Still Air 1oz Copper on SOT-23-5 Package Mounted on recommended mimimum footprint (R ? JA=240°C/W) Figure 4. Power Dissipation vs. Temperature Figure 3. Safe Operating Area Figure 5. Fixed Mode *Distance between pin & capacitor must be no more than 1cm Figure 2. Recommended Minimum Footprint 0 50 100 150 200 250 300 350 400 0.1 0.4 0.7 1.0 1.3 1.6 1.9 2.2 Input-Output Voltage Differential VIN-VOUT (V) Safe Operating Area [Power Dissipation Limit] 1oz Copper on SOT-23-5 Package Mounted on recommended mimimum footprint (RJA=240°C/W) Still air TA=85 °C TA=25 °C TA=55 °C Maximum Recommended Output Current Note: VIN(max) <= 5.5V 1/12/2005 Rev.2.10 SS8014-xxG |
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