TDA18218HN_1

© NXP B.V. 2009. All rights reserved.

Product data sheet

Rev. 01 — 8 July 2009

6 of 25

NXP Semiconductors

TDA18218HN

DVB-T Silicon Tuner IC

It should be noted that the level control is always operating.

The strategy of the level detection has to be adapted for each type of channel decoder. It

must be defined to satisfy ADC sampling (minimum level, ADC headroom).

All AGC amplifiers are controlled independently.

8.4 Power-down mode

The TDA18218HN can be programmed in Standby mode. The following blocks are turned

off when programming a power-down:

Remaining functions are:

9.

Control interface

to the bus. The SDA pin provides bidirectional data transfer. While the SCL pin provides

the timing sequences. Data can be read and written as follows:

Write mode:

register

Read mode:

the subaddress of the register. However, registers can be read as follows:

– from 00h to 16h

– from 00h to 27h

– from 00h to 3Ah

– from 00h to any register subaddress, if MSB = 1 for the next register