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TPA2017D2 Scheda tecnica(PDF) 4 Page - Texas Instruments |
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TPA2017D2 Scheda tecnica(HTML) 4 Page - Texas Instruments |
4 / 20 page RECOMMENDED OPERATING CONDITIONS ELECTRICAL CHARACTERISTICS TPA2017D2 SLOS584 – APRIL 2009 ..................................................................................................................................................................................................... www.ti.com AVAILABLE OPTIONS(1) TA PACKAGED DEVICES(2) PART NUMBER SYMBOL TPA2017D2RTJR – –40°C to 85°C 20-pin, 4 mm × 4 mm QFN (RTJ) TPA2017D2RTJT – (1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI Web site at www.ti.com (2) The RTJ packages are only available taped and reeled. The suffix R indicates a reel of 3000; the suffix T indicates a reel of 250. MIN MAX UNIT VDD Supply voltage AVDD, PVDDR, PVDDL 2.5 5.5 V VIH High-level input voltage EN, AGC1, AGC2 1.3 V VIL Low-level input voltage EN, AGC1, AGC2 0.6 V TA Operating free-air temperature –40 85 °C at TA = 25°C, VDD = 3.6 V, EN = 1.3 V, and RL = 8 Ω + 33 µH (unless otherwise noted). PARAMETER TEST CONDITIONS MIN TYP MAX UNIT VDD Supply voltage range 2.5 3.6 5.5 V EN = 0.35 V, VDD = 2.5 V 0.1 1 ISD Shutdown quiescent current EN = 0.35 V, VDD = 3.6 V 0.2 1 µA EN = 0.35 V, VDD = 5.5 V 0.3 1 VDD = 2.5 V 3.5 4.9 IDD Supply current VDD = 3.6 V 3.7 5.1 mA VDD = 5.5 V 4.5 5.5 fSW Class D Switching Frequency 275 300 325 kHz IIH High-level input current VDD = 5.5 V, EN = 5.8 V 1 µA IIL Low-level input current VDD = 5.5 V, EN = –0.3 V –1 µA tSTART Start-up time 2.5 V ≤ VDD ≤ 5.5 V no pop, CIN ≤ 1 µF 5 ms Power on reset ON threshold 2 2.3 V POR Power on reset hysteresis 0.2 V RL = 8 Ω, Vicm = 0.5 V and Vicm = VDD – 0.8 V, CMRR Input common mode rejection –70 dB differential inputs shorted Voo Output offset voltage VDD = 3.6 V, AV = 6 dB, RL = 8 Ω, inputs ac grounded –10 0 10 mV ZO Output Impedance in shutdown mode EN = 0.35 V 2 k Ω Gain accuracy Compression and limiter disabled, Gain = 0 to 30 dB –0.75 0.75 dB PSRR Power supply rejection ratio VDD = 2.5 V to 4.7 V –80 dB 4 Submit Documentation Feedback Copyright © 2009, Texas Instruments Incorporated Product Folder Link(s): TPA2017D2 |
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