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TPS1101YPW Scheda tecnica(PDF) 2 Page - Texas Instruments |
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TPS1101YPW Scheda tecnica(HTML) 2 Page - Texas Instruments |
2 / 10 page TPS1101, TPS1101Y SINGLE P-CHANNEL ENHANCEMENT-MODE MOSFETS SLVS079C – DECEMBER 1993 – REVISED AUGUST 1995 2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 schematic NOTE A: For all applications, all source terminals should be connected and all drain terminals should be connected. SOURCE DRAIN GATE ESD- Protection Circuitry TPS1101Y chip information This chip, when properly assembled, displays characteristics similar to the TPS1101. Thermal compression or ultrasonic bonding may be used on the doped aluminum bonding pads. The chips may be mounted with conductive epoxy or a gold-silicon preform. BONDING PAD ASSIGNMENTS CHIP THICKNESS: 15 MILS TYPICAL BONDING PADS: 4 × 4 MILS MINIMUM TJmax = 150°C TOLERANCES ARE ±10% ALL DIMENSIONS ARE IN MILS 80 92 TPS1100Y (2) (6) (1) (3) (7) (8) (5) (4) DRAIN SOURCE SOURCE SOURCE GATE DRAIN DRAIN DRAIN (2) (1) (3) (4) (6) (7) (8) (5) |
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