TPIC44H01

4-CHANNEL SERIAL AND PARALLEL HIGH-SIDE PRE-FET DRIVER

SLIS088 – SEPTEMBER 1998

7

POST OFFICE BOX 655303

electrical characteristics over recommended operating case temperature and supply voltage

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

I(open)

Off-state open-load

detection current

All outputs off

–20

–50

–70

µA

Drain to source

V(COMPx) > VCC – 250 mV

1

1.25

1.5

V

V(OVDS)

Drain-to-source

over-voltage

0.1 V < V(COMPx) < 2.5 V,

0.95

×V(COMPx)–15

1.05

×V(COMPx)+15

V

()

over voltage

(COMPx)

,

See Figures 12 and 13

(COMPx)

mV

(COMPx)

mV

V

V(STG)

On-state

short-to-ground

detection voltage

See Figure 17

1.9

2.35

2.6

V

Vhys(STG)

On-state

short-to-ground

hysteresis

–50

–150

–300

mV

I(pullup)

Logic input pullup

current

(CS, RESET)

VCC = 5 V, VIN = 0 V

–5

–20

–50

µA

I(pulldown)

Logic input pulldown

current (IN1 – 4, SCLK,

SDI, AR_ENBL)

VCC = 5 V, VIN = 5 V

5

20

50

µA

Vhys

Logic input voltage

hysteresis (IN1 – 4,

SCLK, SDI, AR_ENBL,

CS)

VCC = 5 V

0.5

0.8

1.2

V

VOH

High level serial output

voltage

IO = – 1 mA

0.8

×VCC

4.96

V

VOL

Low level serial output

voltage

IO = 1 mA

0

100

400

mV

IOZ

Serial data output

tri-state current

V(SDO) = 5.5 V to 0 V,

VCC = 5.5 V

–35

1

35

µA

VOL(FLT)

FLT low level output

voltage

IO = 220 µA

0

30

350

mV

Ilkg(FLT)

FLT leakage current

R(pullup) = 25 K, VCC = 5.5 V

0

1

20

µA

VIH(RESET)

RESET high level logic

input voltage

1.9

2.2

VCC

V

VIL(RESET)

RESET low level logic

input voltage

0

1.2

1.4

V

Vhys(RESET)

Logic input voltage

hysteresis (RESET)

VCC = 5 V

0.6

1

1.4

V

† Device will function with degraded performance for a power supply voltage between 5.5 V and 8 V.