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SN74GTLP1394DGV Scheda tecnica(PDF) 2 Page - Texas Instruments |
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SN74GTLP1394DGV Scheda tecnica(HTML) 2 Page - Texas Instruments |
2 / 9 page SN74GTLP1394 2-BIT LVTTL-TO-GTL+ ADJUSTABLE-EDGE-RATE BUS TRANSCEIVER WITH SELECTABLE POLARITY SCES286 – OCTOBER 1999 2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 description (continued) When VCC is between 0 and 1.5 V, the device is in the high-impedance state during power up or power down. However, to ensure the high-impedance state above 1.5 V, the output-enable (OE) input should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. The SN74GTLP1394 is characterized for operation from –40 °C to 85°C. functional description The output-enable (OEAB) input controls the activity of the B port. When OEAB is low, the B-port outputs are active. When OEAB is high, the B-port outputs are disabled. Separate input and output pins allow the device to transmit and receive simultaneously. The OEBY input controls the Y outputs. When OEBY is low, the Y outputs are active. When OEBY is high, the Y outputs are disabled. The polarity-control (T/C) input is provided to select polarity of data transmission in both directions. When T/C is high, data transmission is true, and A data goes to the B bus and B data goes to the Y bus. When T/C is low, data transmission is complementary, and A data goes to the B bus and B data goes to the Y bus. Function Tables OUTPUT ENABLE INPUTS OPERATION OR FUNCTION MODE T/C OEAB OEBY OPERATION OR FUNCTION MODE X H H Z Isolation H L H A data to B bus True driver H H L B data to Y bus True driver H L L A data to B bus, B data to Y bus True transceiver L LH A data to B bus Inverted driver L HL B data to Y bus Inverted driver L L L A data to B bus, B data to Y bus Inverted transceiver OUTPUT EDGE-RATE CONTROL (ERC) INPUT ERC OUTPUT LOGIC LEVEL NOMINAL VOLTAGE B-PORT EDGE RATE L GND Slow H VCC Fast |
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