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SN74F2373 Scheda tecnica(PDF) 1 Page - Texas Instruments |
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SN74F2373 Scheda tecnica(HTML) 1 Page - Texas Instruments |
1 / 6 page SN74F2373 25- Ω OCTAL TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS SDFS100 – JANUARY 1996 1 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 D Eight Latches in a Single Package D 3-State True Outputs With 25-Ω Sink Resistors D Full Parallel Access for Loading D Buffered Control Inputs D Package Options Include Plastic Small-Outline (DW), Shrink Small-Outline (DB) Packages, and Plastic (N) DIPs description This 8-bit latch features 3-state outputs designed to sink up to 12 mA, and include 25- Ω sink resitors to reduce overshoot and undershoot. The eight latches of the SN74F2373 are transparent D-type latches. While the latch-enable (LE) input is high, the Q outputs follow the data (D) inputs. When the LE is taken low, the Q outputs are latched at the logic levels set up at the D inputs. A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high or low logic levels) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without need for interface or pullup components. OE input does not affect the internal operations of the latches. Old data can be retained or new data can be entered while the outputs are in the high-impedance state. The SN74F373 is available in TI’s shrink small-outline package (DB), which provides the same I/O pin count and functionality of standard small-outline packages in less than half the printed-circuit-board area. The SN74F373 is characterized for operation from 0 °C to 70°C. FUNCTION TABLE (each latch) INPUTS OUTPUT OE LE D Q L H H H L HL L L LX Q0 H X X Z Copyright © 1996, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 OE 1Q 1D 2D 2Q 3Q 3D 4D 4Q GND VCC 8Q 8D 7D 7Q 6Q 6D 5D 5Q LE DB, DW, OR N PACKAGE (TOP VIEW) |
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