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SN74GTL16612ADGGR Scheda tecnica(PDF) 9 Page - Texas Instruments

Il numero della parte SN74GTL16612ADGGR
Spiegazioni elettronici  18-BIT LVTTL-TO-GTL UNIVERSAL BUS TRANSCEIVERS
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Produttore elettronici  TI [Texas Instruments]
Homepage  http://www.ti.com
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SN74GTL16612ADGGR Scheda tecnica(HTML) 9 Page - Texas Instruments

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APPLICATION INFORMATION
GTL Background Information
Input Characteristics
GTL Output Characteristics
VTT
VTT
RTT
RTT
To Other Inputs
Input
Output
GTL Bus
SN54GTL16612A, SN74GTL16612A
18-BIT LVTTL-TO-GTL+ UNIVERSAL BUS TRANSCEIVERS
SCES187D – JANUARY 1999 – REVISED JULY 2005
GTL was approved as JEDEC standard JESD 8-3 in 1993 and originally was created as a reduced-swing I/O
driver technology to support high-speed buses and backplanes. The GTL bus is designed to work with low
voltage swings. The input buffer works like an analog comparator rather than like an inverter, which allows the
GTL inputs to switch quickly without needing to be driven rail to rail. GTL drivers were designed to pull a 1.2-V
signal down to 0.4 V when switched on. This, however, placed the reference voltage for the input comparator at
0.8 V, which made it susceptible to ground-bounce noise. A variant of GTL, called GTL+, is being used to
address this noise-margin concern. The GTL+ termination voltage is raised to 1.5 V, with the driver pulling down
to a VOL of 0.5 V. This moved the reference voltage to 1 V and out of the range of most ground bounces.
TI GTL devices operate at, and are specified for, both GTL and the improved-noise-margin GTL+ standard.
However, the 'GTL16612A devices deviate from this history. They are designed with slow rising and falling
edges, to offer significant system frequency improvement in heavily loaded backplanes. They are AC specified
only at GTL+ because most applications are moving to this improved-noise-margin standard; they operate at
either GTL or GTL+.
Devices named GTL or GTLP indicate reduced voltage-swing operation at a VTT of 1.2 V (GTL standard) or 1.5 V
(improved-noise-margin GTL+ standard). Fast-edge GTL devices are best for point-to-point or lower-frequency
backplanes. Slow-edge GTL devices extend backplane operations to cover even higher frequencies.
The input characteristics are identical on both A and B ports. Both ports are very high impedance and have an
input diode to provide protection against high negative-voltage spikes. The input diode conducts and prevents
more sensitive components from being destroyed as the result of electrostatic discharges or line reflections.
The principle of the GTL bus is based on open-drain drivers, as shown in Figure 3.
Figure 3. GTL Bus: An Open-Drain Bus
The devices actively drive the bus low, whereas, the termination voltage source (VTT) pulls it high. Only the
pullup resistor (RTT), which usually is of a low resistance, limits the current. The pullup resistor value should
match the fully loaded backplane impedance, not the trace impedance, to provide an optimum termination of the
bus and avoid line reflections. The resistance of the GTL output is in the range of a few ohms. However, in the
high state, the output transistor is in the high-impedance state. RTT needs to be greater than 25 Ω at GTL+ signal
levels, not to exceed the 'GTL16612A absolute maximum output current of 80 mA, and should be greater than 50
Ω at GTL+ signal levels, not to exceed the recommended output current limit of 34 mA.
9


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