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SN74GTL16923 Scheda tecnica(PDF) 6 Page - Texas Instruments |
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SN74GTL16923 Scheda tecnica(HTML) 6 Page - Texas Instruments |
6 / 9 page SN54GTL16923, SN74GTL16923 18-BIT LVTTL-TO-GTL/GTL+ BUS TRANSCEIVERS SCBS674E – AUGUST 1996 – REVISED NOVEMBER 1999 6 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 timing requirements over recommended ranges of supply voltage and operating free-air temperature for GTL (unless otherwise noted) SN54GTL16923 SN74GTL16923 UNIT MIN MAX MIN MAX UNIT fclock Clock frequency 200 200 MHz tw Pulse duration, CLK high or low 2.5 2.5 ns t Setup time Data before CLK ↑ 2.7 2.6 ns tsu Setup time CE before CLK ↑ 3.5 3.3 ns th Hold time Data after CLK ↑ 0.2 0.1 ns th Hold time CE after CLK ↑ 0 0 ns switching characteristics over recommended ranges of supply voltage and operating free-air temperature for GTL (see Figure 1) PARAMETER FROM TO SN54GTL16923 SN74GTL16923 UNIT PARAMETER (INPUT) (OUTPUT) MIN TYP† MAX MIN TYP† MAX UNIT fmax 200 200 MHz tPLH CLKAB B 2.1 6 2.2 5.8 ns tPHL CLKAB B 2 6.5 2.1 6.3 ns tdis OEAB B 1.6 5.6 1.7 5.3 ns ten OEAB B 1.9 5.2 2 5 ns Slew rate Both transitions 0.5 0.5 V/ns tr Transition time, B outputs (0.6 V to 1 V) 0.2 3 0.3 2.9 ns tf Transition time, B outputs (1 V to 0.6 V) 0 4.3 0.1 3.9 ns tPLH CLKBA A 1.7 5.3 1.8 5 ns tPHL CLKBA A 1.6 5.1 1.7 4.8 ns ten OEBA A 1.2 5.1 1.3 4.8 ns tdis OEBA A 1.9 5.1 2 4.8 ns † All typical values are at VCC = 3.3 V, TA = 25°C. PRODUCT PREVIEW information concerns products in the formative or design phase of development. Characteristic data and other specifications are design goals. Texas Instruments reserves the right to change or discontinue these products without notice. |
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