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SN74F280BD Scheda tecnica(PDF) 4 Page - Texas Instruments |
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SN74F280BD Scheda tecnica(HTML) 4 Page - Texas Instruments |
4 / 5 page SN54F280B, SN74F280B 9-BIT PARITY GENERATORS/CHECKERS SDFS008A – D2932, APRIL 1986 – REVISED OCTOBER 1993 2–4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 switching characteristics (see Note 2) PARAMETER FROM (INPUT) TO (OUTPUT) VCC = 5 V, CL = 50 pF, RL = 500 Ω, TA = 25°C VCC = 4.5 V to 5.5 V, CL = 50 pF, RL = 500 Ω, TA = MIN to MAX† UNIT (INPUT) (OUTPUT) ′F280B SN54F280B SN74F280B MIN TYP MAX MIN MAX MIN MAX tPLH Any input Σ EVEN 3.2 6.1 9 2.7 13 2.7 10 ns tPHL Any input Σ EVEN 3.2 6.6 10 2.7 15 2.7 11 ns tPLH Any input Σ ODD 3.2 6.1 9 2.7 14 2.7 10 ns tPHL Any input Σ ODD 3.2 6.6 10 2.7 14 2.7 11 ns † For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions. NOTE 2: Load circuits and waveforms are shown in Section 1. |
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