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SN74ACT8997DWR Scheda tecnica(PDF) 3 Page - Texas Instruments

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Il numero della parte SN74ACT8997DWR
Spiegazioni elettronici  SCAN-PATH LINKERS WITH 4-BIT IDENTIFICATION BUSES SCAN-CONTROLLED IEEE STD 1149.1 JTAG TAP CONCATENATORS
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SN74ACT8997DWR Scheda tecnica(HTML) 3 Page - Texas Instruments

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SN54ACT8997, SN74ACT8997
SCAN-PATH LINKERS WITH 4-BIT IDENTIFICATION BUSES
SCAN-CONTROLLED IEEE STD 1149.1 (JTAG) TAP CONCATENATORS
SCAS157D – APRIL 1990 – REVISED DECEMBER 1996
3
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
functional block description
The ’ACT8997 is intended to link secondary scan paths for inclusion in a primary scan path. Any combination
of the four secondary scan paths can be linked, or the device can be bypassed entirely.
The least-significant bit (LSB) of any value scanned into any register of the device is the first bit shifted in
(nearest to TDO). The most-significant bit (MSB) is the last bit shifted in (nearest to TDI).
The ’ACT8997 is divided into functional blocks as detailed below.
test port
The test port decodes the signals on TCK, TMS, and TRST to control the operation of the circuit. The test port
includes a TAP controller that issues the proper control instructions to the data registers according to the
IEEE Standard 1149.1 protocol. The TAP controller state diagram is shown in Figure 1.
instruction register
The instruction register (IR) is an 8-bit-wide serial-shift register that issues commands to the device. Data is
input to the instruction register via TDI (or one of the DTDI pins) and shifted out via TDO. All device operations
are initiated by loading the proper instruction or sequence of instructions into the IR.
data registers
Six parallel data registers are included in the ’ACT8997: bypass, control, counter, boundary-scan, ID-bus, and
select. The ID bus register is a part of the boundary-scan register. Each data register is serially loaded via TDI
or DTDI and outputs data via TDO. Table 1 summarizes the registers in the ’ACT8997.
scan-path-configuration circuit
This circuit decodes bits in the select and control registers to determine which, if any, of the secondary scan
paths are to be included in the primary scan path.
Table 1. Register Summary
REGISTER
NAME
LENGTH
(BITS)
FUNCTION
Instruction
8
Issue command information to the device
Control
10
Configuration and enable control
Counter
8
Count events on DCI, output interrupts via DCO
Select
8
Select one or more secondary scan paths
Boundary Scan
10
Capture and force test data at device periphery
ID Bus
4
Provide subsystem identification code
Bypass
1
Remove the ’ACT8997 from the scan path


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