CDC857-2, CDC857-3

2.5-/3.3-V PHASE-LOCK LOOP CLOCK DRIVERS

SCAS627A – SEPTEMBER 1999 – DECEMBER 1999

4

POST OFFICE BOX 655303

–0.5 V to 4.6 V

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

±50 mA

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

±50 mA

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

±50 mA

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Package thermal impedance,

89

°C/W

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

–65

°C to 150°C

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and

functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not

implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

NOTES:

1. The input and output negative voltage ratings may be exceeded if the input and output clamp-current ratings are observed.

2. This value is limited to 4.6 V maximum.

3. The package thermal impedance is calculated in accordance with JESD 51.

recommended operating conditions (see Note 4)

MIN

NOM

MAX

UNIT

Supply voltage, VCC

2.3

2.7

V

Analog supply voltage AVCC

CDC857–2

2.3

2.7

V

Analog supply voltage, AVCC

CDC857–3

3

3.6

V

Low–level input voltage, VIL(G)

G input

0.3

× VCC

V

High–level input voltage, VIH(G)

G input

0.7

× VCC

V

DC input signal voltage (see Note 5)

CLK, FBIN

–0.3

VCC+0.3

V

Differential input signal voltage, VID

dc

CLK, FBIN

0.35

VCC+0.6

V

gg ,

ID

(see Note 6)

ac

CLK, FBIN

0.7

VCC+0.6

V

Differential cross-point input voltage (see Note 7)

VCC/2–0.2

VCC/2

VCC/2+0.2

V

High-level output current, IOH

–12

mA

Low-level output current, IOL

12

mA

Input slew rate, SR

1

V/ns

Operating free-air temperature, TA

0

85

°C

NOTES:

4. Unused inputs must be held high or low to prevent them from floating.

5. DC input signal voltage specifies the allowable dc execution of differential input.

6. Differential input signal voltage specifies the differential voltage |VTR – VCP| required for switching, where VTR is the true input level

and VCP is the complementary input level (see figure 3).

7. Differential cross-point voltage is expected to track variations of VCC and is the voltage at which the differential signals must be

crossing.