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CD54HC573F Scheda tecnica(PDF) 1 Page - Texas Instruments

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Il numero della parte CD54HC573F
Spiegazioni elettronici  High Speed CMOS Logic Octal Transparent Latch, Three-State Output
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Produttore elettronici  TI [Texas Instruments]
Homepage  http://www.ti.com
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CD54HC573F Scheda tecnica(HTML) 1 Page - Texas Instruments

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Data sheet acquired from Harris Semiconductor
SCHS182
Features
• Common Latch Enable Control
• Common Three-State Output Enable Control
• Buffered Inputs
• Three-State Outputs
• Bus Line Driving Capacity
• Typical Propagation Delay = 12ns at VCC = 5V,
CL = 15pF, TA = 25
oC (Data to Output for HC373)
• Fanout (Over Temperature Range)
- Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
• Wide Operating Temperature Range . . . -55oC to 125oC
• Balanced Propagation Delay and Transition Times
• Significant Power Reduction Compared to LSTTL
Logic ICs
• HC Types
- 2V to 6V Operation
- High Noise Immunity: NIL = 30%, NIH = 30% of VCC
at VCC = 5V
• HCT Types
- 4.5V to 5.5V Operation
- Direct LSTTL Input Logic Compatibility,
VIL= 0.8V (Max), VIH = 2V (Min)
- CMOS Input Compatibility, Il ≤ 1µA at VOL, VOH
Description
The
Harris
CD74HC373,
CD74HCT373,
CD54HC573,
CD74HC573, and CD74HCT573 are high speed Octal Trans-
parent Latches manufactured with silicon gate CMOS technol-
ogy. They possess the low power consumption of standard
CMOS integrated circuits, as well as the ability to drive 15
LSTTL devices. The CD74HCT373 and CD74HCT573 are
functionally as well as pin compatible with the standard
74LS373 and 74LS573.
The outputs are transparent to the inputs when the latch
enable (LE) is high. When the latch enable (LE) goes low the
data is latched. The output enable (OE) controls the three-
state outputs. When the output enable (OE) is high the
outputs are in the high impedance state. The latch operation
is independent to the state of the output enable. The 373 and
573 are identical in function and differ only in their pinout
arrangements.
Ordering Information
PART NUMBER
TEMP. RANGE
(oC)
PACKAGE
PKG.
NO.
CD54HC573F
-55 to 125
20 Ld CERDIP
F20.3
CD74HC373E
-55 to 125
20 Ld PDIP
F20.3
CD74HCT373E
-55 to 125
20 Ld PDIP
E20.3
CD74HC573E
-55 to 125
20 Ld PDIP
E20.3
CD74HCT573E
-55 to 125
20 Ld PDIP
E20.3
CD74HC373M
-55 to 125
20 Ld SOIC
M20.3
CD74HCT373M
-55 to 125
20 Ld SOIC
M20.3
CD74HC573M
-55 to 125
20 Ld SOIC
M20.3
CD74HCT573M
-55 to 125
20 Ld SOIC
M20.3
NOTES:
1. When ordering, use the entire part number. Add the suffix 96 to
obtain the variant in the tape and reel.
2. Wafer or die for this part number are available which meets all
electrical specifications. Please contact your local sales office or
Harris customer service for ordering information.
November 1997
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
Copyright
© Harris Corporation 1997
CD74HC373, CD74HCT373,
CD54HC573, CD74HC573,
CD74HCT573
High Speed CMOS Logic
Octal Transparent Latch, Three-State Output
File Number
1679.1
[ /Title
(CD74
HC373
,
CD74
HCT37
3,
CD54
HC573
,
CD74
HC573
,
CD74
HCT57
3)
/Sub-


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