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CD74ACT10E Scheda tecnica(PDF) 4 Page - Texas Instruments

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Il numero della parte CD74ACT10E
Spiegazioni elettronici  Triple 3-Input NAND Gate
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Produttore elettronici  TI [Texas Instruments]
Homepage  http://www.ti.com
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CD74ACT10E Scheda tecnica(HTML) 4 Page - Texas Instruments

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Switching Specifications Input tr, tf = 3ns, CL = 50pF (Worst Case)
PARAMETER
SYMBOL
VCC (V)
-40oC TO 85oC
-55oC TO 125oC
UNITS
MIN
TYP
MAX
MIN
TYP
MAX
AC TYPES
Propagation Delay, Input to
Output
tPLH, tPHL
1.5
-
-
139
-
-
153
ns
3.3
(Note 9)
4.4
-
15.5
4.3
-
17.1
ns
5
(Note 10)
3.1
-
11.1
3.1
-
12.2
ns
Input Capacitance
CI
-
-
-10-
-10
pF
Power Dissipation Capacitance
CPD
(Note 11)
-
-
50
-
-
50
-
pF
ACT TYPES
Propagation Delay, Input to
Output
tPHL
5
(Note 10)
3.5
-
12.3
3.4
-
13.5
ns
Input Capacitance
CI
-
-
-10-
-10
pF
Power Dissipation Capacitance
CPD
(Note 11)
-
-
50
-
-
50
-
pF
NOTES:
8. Limits tested at 100%.
9. 3.3V Min at 3.6V, Max at 3V.
10. 5V Min at 5.5V, Max at 4.5V.
11. CPD is used to determine the dynamic power consumption per gate.
AC: PD = VCC
2 f
i (CPD + CL)
ACT: PD = VCC
2 f
i (CPD + CL) + VCC ∆ICC where fi = input frequency, CL = output load capacitance, VCC = supply voltage.
DUT
OUTPUT
RL (NOTE)
OUTPUT
LOAD
500
CL
50pF
NOTE: For AC Series Only: When VCC = 1.5V, RL = 1kΩ.
FIGURE 1. PROPAGATION DELAY TIMES
CD74AC
CD74ACT
Input Level
VCC
3V
Input Switching Voltage, VS
0.5 VCC
1.5V
Output Switching Voltage, VS
0.5 VCC
0.5 VCC
FIGURE 2. PROPAGATION DELAY TIMES
tr = 3ns
tf = 3ns
90%
VS
10%
GND
INPUT
tPHL
tPLH
VS
LEVEL
VI
VO
CD74AC10, CD74ACT10


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