CD74HCT11E datasheet(1/6 Pages) TI

Il numero della parte	CD74HCT11E

Spiegazioni elettronici	High Speed CMOS Logic Triple 3-Input AND Gate

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Produttore elettronici	TI [Texas Instruments]

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Data sheet acquired from Harris Semiconductor

SCHS273A

Features

• Buffered Inputs

• Typical Propagation Delay: 8ns at VCC = 5V,

CL = 15pF, TA = 25

oC

• Fanout (Over Temperature Range)

- Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads

- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads

• Wide Operating Temperature Range . . . -55oC to 125oC

• Balanced Propagation Delay and Transition Times

• Signiﬁcant Power Reduction Compared to LSTTL

Logic ICs

• HC Types

- 2V to 6V Operation

- High Noise Immunity: NIL = 30%, NIH = 30% of VCC

at VCC = 5V

• HCT Types

- 4.5V to 5.5V Operation

- Direct LSTTL Input Logic Compatibility,

VIL= 0.8V (Max), VIH = 2V (Min)

- CMOS Input Compatibility, Il ≤ 1µA at VOL, VOH

Description

The ’HC11 and ’HCT11 logic gates utilize silicon gate CMOS

technology to achieve operating speeds similar to LSTTL

gates with the low power consumption of standard CMOS

integrated circuits. All devices have the ability to drive 10

LSTTL loads. The HCT logic family is functionally pin

compatible with the standard LS logic family.

Pinout

CD54HC11, CD54HCT11

(CERDIP)

CD54HCT11, CD74HC11, CD74HCT11

(PDIP, SOIC)

TOP VIEW

Ordering Information

PART NUMBER

TEMP. RANGE

(oC)

PACKAGE

CD54HC11F

-55 to 125

14 Ld CERDIP

CD54HC11F3A

-55 to 125

14 Ld CERDIP

CD74HC11E

-55 to 125

14 Ld PDIP

CD74HC11M

-55 to 125

14 Ld SOIC

CD54HCT11F

-55 to 125

14 Ld CERDIP

CD54HCT11F3A

-55 to 125

14 Ld CERDIP

CD74HCT11E

-55 to 125

14 Ld PDIP

CD74HCT11M

-55 to 125

14 Ld SOIC

NOTES:

1. When ordering, use the entire part number. Add the sufﬁx 96 to

obtain the variant in the tape and reel.

2. Die for this part number is available which meets all electrical

specifications. Please contact your local TI sales office or cus-

tomer service for ordering information.

1A

1B

2A

2B

2C

2Y

GND

VCC

1C

1Y

3C

3B

3A

3Y

1

2

3

4

5

6

7

14

13

12

11

10

9

8

August 1997 - Revised May 2000

CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.

Copyright

CD54/74HC11,

CD54/74HCT11

High Speed CMOS Logic

Triple 3-Input AND Gate

[ /Title

(CD54

HCT11

,

CD74

HC11,

CD74

HCT11

)

/Sub-

ject

(High

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