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CD54ACT161F3A Scheda tecnica(PDF) 4 Page - Texas Instruments |
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CD54ACT161F3A Scheda tecnica(HTML) 4 Page - Texas Instruments |
4 / 14 page CD54ACT161, CD74ACT161 4-BIT SYNCHRONOUS BINARY COUNTERS SCHS298B – APRIL 2000 – REVISED MARCH 2003 4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 logic symbol, each D/T flip-flop M1 LD (Load) Q (Output) G2 TE (Toggle Enable) CK (Clock) G4 3D 4R 1, 2T/1C3 D (Inverted Data) R (Inverted Reset) logic diagram, each D/T flip-flop (positive logic) TG TG TG TG TG TG CK LD TE LD† LD† D R CK† CK† CK† CK† Q † The origins of LD and CK are shown in the logic diagram of the overall device. |
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