CD54ACT163, CD74ACT163

4-BIT SYNCHRONOUS BINARY COUNTERS

SCHS300 – APRIL 2000

2

POST OFFICE BOX 655303

FUNCTION TABLE

INPUTS

OUTPUTS

FUNCTION

CLR

CLK

ENP

ENT

LOAD

A,B,C,D

Qn

RCO

FUNCTION

L

↑

X

X

X

X

L

L

Reset (clear)

h

↑

X

X

l

l

L

L

Parallel load

h

↑

XX

l

h

H

Note 1

Parallel load

h

↑

h

h

h

X

Count

Note 1

Count

h

X

l

X

h

X

qn

Note 1

Inhibit

h

X

X

l

h

X

qn

L

Inhibit

H = high level, L = low level, X = don’t care, h = high level one setup time prior to the CLK

low-to-high transition, l = low level one setup time prior to the CLK low-to-high transition, q = the

state of the referenced output prior to the CLK low-to-high transition,

↑ = CLK low-to-high

transition.

NOTE 1: The RCO output is high when ENT is high and the counter is at terminal count (HHHH).

† This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.

14

13

12

11

CTRDIV16

LOAD

1,5D

3

A

4

B

5

C

6

D

5CT=0

1

M2

M1

9

C5/2,3,4+

G3

10

ENT

RCO

15

3CT=15

QA

QB

QC

QD

G4

7

ENP

2

CLK

CLR

[1]

[2]

[4]

[8]