LA6559

No.A0597-5/9

Pin Functions

Pin No.

Symbol

Pin descriptions

1

REV

5CH (VLO) Output change pin (REV), logic input for loading block.

2

S-VCC

Signal system power supply (BTL-AMP : CH1 to 4)

3

VCC2

Power supply for loading block

4

VLO-

Loading output (-)

5

VLO+

Loading output (+)

6

VO4+

Output pin (+) for channel 4

7

VO4-

Output pin (-) for channel 4

8

VO3+

Output pin (+) for channel 3

9

VO3-

Output pin (-) for channel 3

10

VO2+

Output pin (+) for channel 2

11

VO2-

Output pin (-) for channel 2

12

VO1+

Output pin (+) for channel 1

13

VO1-

Output pin (-) for channel 1

14

VCC1

CH1 to CH4 (BTL-AMP) output stage power supply

15

VIN1

Input pin for channel 1

16

VIN1-

OP-AMP input AMP-A input pin (-)

17

VIN1+

OP-AMP input AMP-A input pin (+)

18

VIN2

Input pin for channel 2, input AMP output

19

VIN2-

Input pin (-) for channel 2

20

VIN2+

Input pin (+) for channel 2

21

VCC-VREG

3.3VREG power supply

22

GND-VREG

3.3VREG GND

23

VIN3

Input pin for channel 3, input AMP output

24

VIN3-

Input pin (-) for channel 3

25

VIN3+

Input pin (+) for channel 3

26

REG-IN

PNP transistor base connected

27

REG-OUT

3.3V power output to which the PNP transistor collector connected.

28

VCONT (LOADING)

Output voltage set pin for loading block

29

VREF-IN

Reference voltage applied pin

30

VIN4+

Input pin (+) for channel 4

31

VIN4-

Input pin (-) for channel 4

32

VIN4

Input pin for channel 4, input AMP output

33

MUTE1

Output ON/OFF, channel 1 (BTL AMP)

34

MUTE2

Output ON/OFF, channel 2 to 4 (BTL AMP)

35

S-GND

Signal system GND

36

FWD

Output change pin (FWD) for loading output (VLO+ -), logic input for loading block.

Note 1 : Center frame (FR) becomes GND for the power system (P-GND). Set this to the minimum potential together with S-GND.

Note 2 : Short-circuit each of VCC1, VCC2, VCC-VREG, and S-VCC power pins externally.