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MC-ACT-G704E1-VHD Scheda tecnica(PDF) 4 Page - Actel Corporation |
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MC-ACT-G704E1-VHD Scheda tecnica(HTML) 4 Page - Actel Corporation |
4 / 5 page IntSrc_FSync.MFA.SyncLoss Output Pulse @ ‘1’ when leaving state InSync IntSrc_Fan.AlarmByteCaptured Output Pulse @ ‘1’ when 8 A-bits have been captured (only when BFSyncState = InSync and MFSyncState /= InSync ) IntSrc_Fan.A_Bit_detected Output Pulse @ ‘1’ when A-Bit sequence “001” has been received IntSrc_FSync.BFB.Sync Output Pulse @ ‘1’ when entering state InSync IntSrc_FSync.BFB.SyncLoss Output Pulse @ ‘1’ when leaving state InSync IntSrc_FSync.MFB.SyncEntry Output Pulse @ ‘1’ when entering state InSync IntSrc_FSync.MFB.MFSync Output Pulse @ ‘1’ at begin of each MultiFrame Status_FAn.LOS_2M Output 2MBit Loss detection Status_FAn.AIS Output AIS detection result Status_FAn.TS0Data Output TS0 Data, OTHERS => ‘0’ when not InSync Status_FAn.AlarmHistory Output Sampled history of last 8 A-bits Status_FAn.ErrorCountCRC[7:0] Output Sampled state of CRC error counter Status_FAn.ErrorCountFAS[7:0] Output Sampled state of FAS/nFAS error counter Status_FAn.ErrorCountE[7:0] Output Sampled state of E-Bit counter SampleCmds.SampleCRC Input Active ‘1’ during one clock cycle, when up write access has been detected to the read-only port of the related counter SampleCmds.SampleFAS Input Active ‘1’ during one clock cycle, when up write access has been detected to the read-only port of the related counter SampleCmds.SampleE Input Active ‘1’ during one clock cycle, when up write access has been detected to the read-only port of the related counter Data_in_FSC.Data Input Binary NRZ data Data_in_FSC.DataEbl Input Data enable Data_in_FSC.FSync Input (FSC) Frame Sync pulse DiFramed.Data Output Binary NRZ Data, synchronized to local clock domain DiFramed.DataEbl Output Data enable DiFrameRef.BF.BitNr[2:0] Output Frame reference pointer identifying every bit in a frame: Bit number within time slot 1 .. 8 DiFrameRef.BF.TSNr[4:0] Output Time slot number 0 .. 31 DiFrameRef.BF.BFNr Output Basic frame number DiFrameRef.BF.BFSyncState[1:0] Output Basic Frame synchronization state: “01”: Hunt, “00”: Recover, “10”: InSync, “11”: OutOFSync DiFrameRef.BF.TSInd Output Time slot indicator ‘1’ when bit number = 7 DiFrameRef.BF.TS0Ind_BF1 Output Time slot 0 indicator of basic frame 1 DiFrameRef.BF.TS0Ind_BF2 Output Time slot 0 indicator of basic frame 2 DiFrameRef.BF.FSync Output ‘1’ when 1st bit of a frame when BFSyncState = InSync DiFrameRef.MF.FrameNr[3:0] Output Multi frame synchronization state: “00”: Hunt, “01”: Recover, “10”: ParRecover, “11”: InSync DiFrameRef.MF.SMFInd Output Sub multi frame indicator ‘1’ at last bit of previous sub multi frame DiFrameRef.MF.MFInd Output Multi frame indicator DiFrameRef.MF.SMFSync Output ‘1’ at 1st bit of sub multi frame when MFSyncState = InSync DiFrameRef.MF.next_MFSync Output ‘1’ one bit before MFSync DiFrameRef.MF.MFSync Output ‘1’ at 1st bit of multi frame when MFSyncState = InSync Do_FSC.Data Input Binary NRZ data Do_FSC.DataEbl Input Data enable Do_FSC.FSync Input (FSC) Frame Sync pulse DataOut_FSC.Data Output Binary NRZ Data, synchronized to local clock domain DataOut_FSC.DataEbl Output Data enable DataOut_FrameRef[24:0] Output Frame reference pointer (see DiFrameRef) Table 2: Core I/O Signals |
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