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TEA1007 Scheda tecnica(PDF) 2 Page - TEMIC Semiconductors

Il numero della parte TEA1007
Spiegazioni elettronici  Simple Phase Control Circuit
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Produttore elettronici  TEMIC [TEMIC Semiconductors]
Homepage  http://www.temic.de
Logo TEMIC - TEMIC Semiconductors

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TEA1007
TELEFUNKEN Semiconductors
Rev. A1, 28-May-96
2 (8)
General Description
The phase-shift of the ignition point is determined in the
usual
manner
by
comparison
between
a
mains
synchronized ramp voltage and a predetermined required
value. The capacitor Cö/t between Pin 7 and the common
reference point Pin 8 is discharged at the zero transition
of the mains voltage via the Vo detector, gate G2 and
switch S2. After the end of the zero transition pulse, Cö/t
is charged from the constant current source Iö, whose
value is adjusted externally with Rö at Pin 3 due to the
unavoidable tolerance of Cö/t (Phase 1).
When the potential at Pin 7 reaches the nominal value
predetermined at Pin 6, the thyristor Th1, which also
functions as a comparator, ignites and sets the following
clock flip-flop. The output of the clock flip-flop releases
the output amplifier, connects a second constant current
source to the capacitor Cö/t, and switches the reference
voltage switch S1 to an internally generated threshold
voltage VRef1 via an RS flip-flop and the OR gate G1.
The capacitor Cö/t is charged in this second phase by
Iö + Itp until it reaches the internal reference voltage
VRef. The length of this Phase 2 corresponds to the width
of the output pulse tp. When the capacitor voltage reaches
the value VRef, thyristor Th1 ignites again and resets the
clock flip-flop to its initial state. The output pulse is thus
terminated and the constant source Itp is switched off.
However, the RS flip-flop holds the switch S1 so that the
internal reference voltage remains connected to Th1. As
VRef is greater than the maximum permissible control
voltage at Pin 6, this prevents more than one ignition
pulse from being generated in each half-cycle of the
mains voltage. This is particularly important because the
energy contents of the output pulse is of the same order
as the internal requirements of the circuit for each
half-wave.
In the following zero transition of the mains voltage, the
zero transition detector (Input Pin 5) resets the RS
flip-flop, discharges Cö/t again via S2, and also insures
that the clock flip-flop is in the reset condition. A further
part of the basic function is the current detector with its
input at Pin 4. When controlling inductive loads, the load
current lags behind the mains voltage which means that
the circuit could generate an ignition pulse during the
period in which current is still flowing with a polarity
opposite to that of the mains voltage if the current were
not taken into account (see figure 2).
This, in turn, would lead, to so-called “gaps” in the load
current as the next ignition pulse is generated in the subse-
quent half-cycle.
95 11358
Figure 2. Functional diagram for inductive load of
amax
95 11360
Figure 3. Triac voltages + currents at resistive load
Vo
= Zero cross voltage
IO
= Zero cross current
VM
= Mains voltage
IL
= Load current
IG
= Gate current
VHI
= Triac voltage at anode HI


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