CDB43L22 datasheet(7/68 Pages) CIRRUS

Il numero della parte	CDB43L22

Spiegazioni elettronici	Low Power, Stereo DAC w/Headphone & Speaker Amps

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Produttore elettronici	CIRRUS [Cirrus Logic]

Homepage	http://www.cirrus.com

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7 / 68 page

DS792F1

7

CS43L22

Confidential Draft

10/7/08

1. PIN DESCRIPTIONS

Pin Name

#

Pin Description

SDA

1

Serial Control Data (Input/Output) - SDA is a data I/O in I²C Mode.

SCL

2

Serial Control Port Clock (Input) - Serial clock for the serial control port.

AD0

3

Address Bit 0 (I²C) (Input) - AD0 is a chip address pin in I²C Mode;

SPKR_OUTA+

SPKR_OUTA-

SPKR_OUTB+

SPKR_OUTB-

4

6

7

9

PWM Speaker Output (Output) - Full-bridge amplified PWM speaker outputs.

VP

5

8

Power for PWM Drivers (Input) - Power supply for the PWM output driver stages.

-VHPFILT

10

Inverting Charge Pump Filter Connection (Output) - Power supply from the inverting charge

pump that provides the negative rail for the headphone/line amplifiers.

FLYN

11

Charge Pump Cap Negative Node (Output) - Negative node for the inverting charge pump’s fly-

ing capacitor.

FLYP

12

Charge Pump Cap Positive Node (Output) - Positive node for the inverting charge pump’s flying

capacitor.

+VHP

13

Positive Analog Power for Headphone (Input) - Positive voltage rail and power for the internal

headphone amplifiers and inverting charge pump.

HP/LINE_OUTB, A

14,15 Headphone/Line Audio Output (Output) - Stereo headphone or line level analog outputs.

VA

16

Analog Power (Input) - Positive power for the internal analog section.

29

30

28

27

26

25

24

23

22

21

2

1

3

4

5

6

7

8

9

10

GND/Thermal Pad

SDA

AIN4A

AIN2A

AD0

SPKR_OUTA+

VP

SPKR_OUTB-

-VHPFILT

AIN4B

AIN1B

AIN2B

AFILTB

AIN3B

AFILTA

AIN1A

AIN3A

SPKR_OUTB+

SCL

SPKR_OUTA-

Top-Down (Through-Package) View

40-Pin QFN Package

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