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TEA1750T Scheda tecnica(PDF) 7 Page - NXP Semiconductors

Il numero della parte TEA1750T
Spiegazioni elettronici  GreenChip III SMPS control IC
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Produttore elettronici  NXP [NXP Semiconductors]
Homepage  http://www.nxp.com
Logo NXP - NXP Semiconductors

TEA1750T Scheda tecnica(HTML) 7 Page - NXP Semiconductors

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TEA1750_2
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 02 — 15 December 2008
7 of 29
NXP Semiconductors
TEA1750
GreenChip III SMPS control IC
7.1.2 Supply management
All internal reference voltages are derived from a temperature compensated and trimmed
on-chip band gap circuit. Internal reference currents are derived from a temperature
compensated and trimmed on-chip current reference circuit.
7.1.3 Latch input
Pin LATCH is a general purpose input pin, which can be used to switch off both
converters. The pin sources a current, IO(LATCH) on pin LATCH (typ 80 µA). Switching of
both converters is stopped as soon as the voltage on this pin drops below 1.25 V.
At initial start-up, switching is inhibited until the voltage on the LATCH pin is above 1.35 V
(typ). No internal filtering is done on this pin. An internal Zener clamp of 2.7 V (typ)
protects this pin from excessive voltages.
Fig 4.
Start-up sequence, normal operation, and re-start sequence
IHV
VCC
LATCH
PROTECTION
PFCSENSE
PFCDRIVER
FBSENSE
FBDRIVER
FBCTRL
VOSENSE
Vout
CHARGING VCC
CAPACITOR
STARTING
CONVERTERS
NORMAL
OPERATION
PROTECTION
RESTART
soft start
soft start
VINSENSE
Vstartup
Vth(UVLO)
Vtrip
Ven(LATCH)
Vto(FBCTRL)
Vstart(fb)
Vstart(VINSENSE)
014aaa060


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