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STPS5L40 Scheda tecnica(PDF) 3 Page - STMicroelectronics |
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STPS5L40 Scheda tecnica(HTML) 3 Page - STMicroelectronics |
3 / 5 page STPS5L40 3/5 0 2 4 6 8 10 12 14 16 18 1.E-03 1.E-02 1.E-01 1.E+00 t(s) Ta=25°C Ta=50°C Ta=100°C IM(A) IM t δ=0.5 Fig. 5: Non repetitive surge peak forward current versus overload duration (maximum values). 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.E-01 1.E+00 1.E+01 1.E+02 1.E+03 tp(s) δ = 0.5 δ = 0.2 δ = 0.1 Single pulse T δ=tp/T tp Zth(j-a)/Rth(j-a) Fig. 6: Relative variation of thermal impedance junction to ambient versus pulse duration. 1.E-03 1.E-02 1.E-01 1.E+00 1.E+01 1.E+02 0 5 10 15 20 25 30 35 40 VR(V) Tj=150°C Tj=125°C Tj=25°C Tj=100°C Tj=75°C Tj=50°C IR(mA) Fig. 7: Reverse leakage current versus reverse voltage applied (typical values). 10 100 1000 1 10 100 VR(V) F=1MHz Vosc=30mV Tj=25°C C(pF) Fig. 8: Junction capacitance versus reverse voltage applied (typical values). 0 0.2 0.4 0.6 0.8 1 1.2 0 25 50 75 100 125 150 T (°C) j P(t ) P (25°C) ARM p ARM Fig. 4: Normalized avalanche power derating versus junction temperature. 0.001 0.01 0.1 0.01 1 0.1 10 100 1000 1 t (µs) p P(t ) P (1µs) ARM p ARM Fig. 3: Normalized avalanche power derating versus pulse duration. |
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