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MC145152-2 Scheda tecnica(PDF) 8 Page - Freescale Semiconductor, Inc |
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MC145152-2 Scheda tecnica(HTML) 8 Page - Freescale Semiconductor, Inc |
8 / 24 page MC145151-2 and MC145152-2 Technical Data, Rev. 5 8 Freescale Semiconductor MC145152-2 Parallel-Input (Interfaces with Dual-Modulus Prescalers) Figure 6. MC145152-2 Block Diagram 2.2 Pin Descriptions 2.2.1 Input Pins fin Frequency Input (Pin 1) Input to the positive edge triggered ÷ N and ÷ A counters. f in is typically derived from a dual-modulus prescaler and is AC coupled into the device. For larger amplitude signals (standard CMOS logic levels) DC coupling may be used. RA0, RA1, RA2 Reference Address Inputs (Pins 4, 5, 6) These three inputs establish a code defining one of eight possible divide values for the total reference divider. The total reference divide values are as follows: Reference Address Code Total Divide Value RA2 RA1 RA0 0 0 0 0 1 1 1 1 0 0 1 1 0 0 1 1 0 1 0 1 0 1 0 1 8 64 128 256 512 1024 1160 2048 12 x 8 ROM REFERENCE DECODER φ V φ R 12-BIT ÷ R COUNTER PHASE DETECTOR LOCK DETECT LD fin OSCin OSCout 12 N0 N2 N4 N5 N7 N9 NOTE: N0 - N9, A0 - A5, and RA0 - RA2 have pull-up resistors that are not shown. 10-BIT ÷ N COUNTER CONTROL LOGIC MC 6-BIT ÷ A COUNTER A5 A3 A2 A0 RA2 RA0 RA1 |
Codice articolo simile - MC145152-2 |
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Descrizione simile - MC145152-2 |
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