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MC145151-2 Scheda tecnica(PDF) 11 Page - Freescale Semiconductor, Inc |
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MC145151-2 Scheda tecnica(HTML) 11 Page - Freescale Semiconductor, Inc |
11 / 24 page MC145152-2 Parallel-Input (Interfaces with Dual-Modulus Prescalers) MC145151-2 and MC145152-2 Technical Data, Rev. 5 Freescale Semiconductor 11 Figure 8. 666-Channel Computer-Controlled, Mobile Radiotelephone Synthesizer for 800 MHz Cellular Radio Systems NOTES: 1. Receiver 1st I.F. = 45 MHz, low side injection; Receiver 2nd I.F. = 11.7 MHz, low side injection. 2. Duplex operation with 45 MHz receiver/transmit separation. 3. fR = 7.5 kHz; ÷ R = 2048. 4. Ntotal = N • 64 + A = 27501 to 28166; N = 429 to 440; A = 0 to 63. 5. High frequency prescalers may be used for higher frequency VCO and fref implementations. 6. The φ R and φV outputs are fed to an external combiner/loop filter. See the Phase-Locked Loop - Low-Pass Filter Design page for additional information. The φ R and φV outputs swing rail-to-rail. Therefore, the user should be careful not to exceed the common mode input range of the op amp used in the combiner/loop filter. LOCK DETECT SIGNAL R1 + RECEIVER FIRST L.O. 825.030 → 844.980 MHz (30 kHz STEPS) ÷ 64/65 PRESCALER NOTE 5 MC145152-2 MC LD A0 A5 N9 OSCin VDD VSS OSCout RA2 RA1 φ R φ V fin - VCO RA0 N0 + V R1 R2 C R2 C “1" “1" “1" CHANNEL PROGRAMMING REF. OSC. 15.360 MHz (ON-CHIP OSC. OPTIONAL) X2 X4 NOTE 5 X4 NOTE 5 TRANSMITTER MODULATION TRANSMITTER SIGNAL 825.030 → 844.980 MHz (30 kHz STEPS) RECEIVER 2ND L.O. 30.720 MHz NOTE 6 NO CONNECTS |
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