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DAC6311IDCKT Scheda tecnica(PDF) 3 Page - Texas Instruments |
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DAC6311IDCKT Scheda tecnica(HTML) 3 Page - Texas Instruments |
3 / 40 page ELECTRICAL CHARACTERISTICS DAC5311 DAC6311 DAC7311 www.ti.com ................................................................................................................................................................................................ SBAS442 – AUGUST 2008 At AVDD = +1.8V to +5.5V, RL = 2kΩ to GND, and CL = 200 pF to GND, unless otherwise noted. DAC5311, DAC6311, DAC7311 PARAMETER TEST CONDITIONS MIN TYP MAX UNIT STATIC PERFORMANCE(1) Resolution 8 Bits Relative accuracy Measured by the line passing through codes 3 and 252 ±0.01 ±0.25 LSB DAC5311 Differential ±0.01 ±0.25 LSB nonlinearity Resolution 10 Bits Relative accuracy Measured by the line passing through codes 12 and 1012 ±0.06 ±0.5 LSB DAC6311 Differential ±0.03 ±0.5 LSB nonlinearity Resolution 12 Bits Relative accuracy Measured by the line passing through codes 30 and 4050 ±0.3 ±1 LSB DAC7311 Differential ±0.2 ±1 LSB nonlinearity Offset error Measured by the line passing through two codes(2) ±0.05 ±4 mV Offset error drift 3 µV/°C Zero code error All zeros loaded to the DAC register 0.2 mV Full-scale error All ones loaded to DAC register 0.04 0.2 % of FSR Gain error 0.05 ±0.15 % of FSR AVDD = +5V ±0.5 ppm of Gain temperature coefficient FSR/°C AVDD = +1.8V ±1.5 OUTPUT CHARACTERISTICS(3) Output voltage range 0 AVDD V RL = 2kΩ, CL = 200 pF, AVDD = 5V, 1/4 scale to 3/4 scale 6 10 µs Output voltage settling time RL = 2MΩ, CL = 470pF 12 µs Slew rate 0.7 V/ µs RL = ∞ 470 pF Capacitive load stability RL = 2kΩ 1000 pF Code change glitch impulse 1LSB change around major carry 0.5 nV-s Digital feedthrough 0.5 nV-s Power-on glitch impulse RL = 2kΩ, CL = 200pF, AVDD = 5V 17 mV DC output impedance 0.5 Ω AVDD = +5V 50 mA Short-circuit current AVDD = +3V 20 mA Power-up time Coming out of power-down mode 50 µs AC PERFORMANCE SNR 81 dB TA= +25°C, BW = 20kHz, 12-bit level, AVDD = 5V, THD –65 dB fOUT = 1kHz, 1st 19 harmonics removed for SNR SFDR 65 dB calculation SINAD 65 dB TA= +25°C, at zero-scale input, fOUT = 1kHz, AVDD = 5V 17 nV/ √Hz DAC output noise density(4) TA= +25°C, at mid-code input, fOUT = 1kHz, AVDD = 5V 110 nV/ √Hz DAC output noise(5) TA= +25°C, at mid-code input, 0.1Hz to 10Hz, AVDD = 5V 3 µV PP (1) Linearity calculated using a reduced code range of 3 to 252 for 8-bit, 12 to 1012 for 10bit, and 30 to 4050 for 12-bit, output unloaded. (2) Straight line passing through codes 3 and 252 for 8-bit, 12 and 1012 for 10bit, and 30 and 4050 for 12-bit, output unloaded. (3) Specified by design and characterization, not production tested. (4) For more details, see Figure 22. (5) For more details, see Figure 23. Copyright © 2008, Texas Instruments Incorporated Submit Documentation Feedback 3 Product Folder Link(s): DAC5311 DAC6311 DAC7311 |
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