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ADE3800SXL Scheda tecnica(PDF) 6 Page - STMicroelectronics |
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ADE3800SXL Scheda tecnica(HTML) 6 Page - STMicroelectronics |
6 / 138 page Important Information ADE3800 6/138 1 Important Information ● XCLK: Crystal oscillator, usually 27 MHz. ● INCLK: ADC Sampling clock frequency, depends on input video mode pixel rate. ● DOTCLK and OUTCLK: Related to Panel Output Pixel Rate. ● SCLK: Scale Clock used for the line buffer Ram and picture zooming. ● If some bit fields are missing, these bits are marked as "reserved": — return 0 when read, but it is also the user's duty to mask them upon readout, to ensure compatibility with later device releases — must be written to 0 when the whole register is written in all cases, the default reset value always prevails ● An asterisk denotes the default reset value for the corresponding bit(s). ● Unless all addresses and registers values are in hexadecimal. ● “not sticky” means dynamically updated (set or reset) by hardware, not a static bit. ● A “sticky” bit, once set remains set until the user clears it. ● When a value is followed by “typ” this means it is a typical value and PVT dependent. ● If a time or delay value does not have “min/typ/max” information, it is proportional to the XCLK frequency. ● Any register names containing HW are shadow registers: they report which value is currently being used by the chip. ● When a register bit field list has one bold option, it is the only choice for normal mode of operation. ● TCON must always be programmed for any panel type. ● Values spread out over several registers are organised as follows: 32-bit values 24-bit values 16-bit values _0 LSB _L or _0 LSB _L LSB _1 _M or _1 MSB _U USB _2 _U or _2 USB _3 USB |
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