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TS1220-X00B-TR Scheda tecnica(PDF) 4 Page - STMicroelectronics |
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TS1220-X00B-TR Scheda tecnica(HTML) 4 Page - STMicroelectronics |
4 / 12 page Characteristics TN12, TS12 and TYNx12 Series 4/12 Figure 3. Average and D.C. on-state current versus ambient temperature (device mounted on FR4 with recommended pad layout) (DPAK) Figure 4. Relative variation of thermal impedance junction to case versus pulse duration 0 25 50 75 100 125 0.0 0.5 1.0 1.5 2.0 2.5 3.0 I (A) T(AV) T (°C) amb α = 180° D.C. DPAK 2 DPAK 1E-3 1E-2 1E-1 1E+0 0.1 0.2 0.5 1.0 K=[Z /R th(j-c) th(j-c)] t (s) p Figure 5. Relative variation of thermal impedance junction to ambient versus pulse duration (recommended pad layout, FR4 PC board for DPAK) Figure 6. Relative variation of gate trigger current and holding current versus junction temperature for TS12 series 1E-2 1E-1 1E+0 1E+1 1E+2 5E+2 0.01 0.10 1.00 K=[Z /R th(j-a) th(j-a)] t (s) p DPAK TO-220AB / IPAK DPAK 2 -40 -20 0 20 40 60 80 100 120 140 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 T (°C) j I,I ,I [T ] / GTHL j I ,I ,I [T =25°C] GT H L j IGT IH & I R = 1k L GK Ω Figure 7. Relative variation of gate trigger current and holding current versus junction temperature for TN12 and TYNx12 series Figure 8. Relative variation of holding current versus gate-cathode resistance (typical values) for TS12 series -40 -20 0 20 40 60 80 100 120 140 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4 I,I ,I [T ] / GT H L j I ,I ,I [T =25°C] GT H L j T (°C) j IGT IH & IL 1E-2 1E-1 1E+0 1E+1 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 R(k ) GK Ω I [R ] / I [ =1k ] HGK H Ω RGK Tj = 25°C |
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