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M27V322-120XB1 Scheda tecnica(PDF) 7 Page - STMicroelectronics |
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M27V322-120XB1 Scheda tecnica(HTML) 7 Page - STMicroelectronics |
7 / 23 page M27V322 Device operation 7/23 2 Device operation The operating modes of the M27V322 are listed in the Operating Modes Table. A single power supply is required in the read mode. All inputs are TTL compatible except for VPP and 12V on A9 for the Electronic Signature. 2.1 Read mode The M27V322 has a word-wide organization. Chip Enable (E) is the power control and should be used for device selection. Output Enable (G) is the output control and should be used to gate data to the output pins independent of device selection. Assuming that the addresses are stable, the address access time (tAVQV) is equal to the delay from E to output (tELQV). Data is available at the output after a delay of tGLQV from the falling edge of GVPP, assuming that E has been low and the addresses have been stable for at least tAVQV-tGLQV. 2.2 Standby mode The M27V322 has a standby mode which reduces the supply current from 30mA to 30µA. The M27V322 is placed in the standby mode by applying a CMOS high signal to the E input.When in the standby mode, the outputs are in a high impedance state, independent of the GVPP input. 2.3 Two Line Output Control Because EPROMs are usually used in larger memory arrays, this product features a 2 line control function which accommodates the use of multiple memory connection. The two line control function allows: ● the lowest possible memory power dissipation, ● complete assurance that output bus contention will not occur. For the most efficient use of these two control lines, E should be decoded and used as the primary device selecting function, while GVPP should be made a common connection to all devices in the array and connected to the READ line from the system control bus. This ensures that all deselected memory devices are in their low power standby mode and that the output pins are only active when data is required from a particular memory device. |
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