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74LCX240TTR Scheda tecnica(PDF) 1 Page - STMicroelectronics |
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74LCX240TTR Scheda tecnica(HTML) 1 Page - STMicroelectronics |
1 / 12 page 1/12 September 2004 s 5V TOLERANT INPUTS AND OUTPUTS s HIGH SPEED: tPD = 6.5 ns (MAX.) at VCC = 3V s POWER DOWN PROTECTION ON INPUTS AND OUTPUTS s SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 24mA (MIN) at VCC = 3V s PCI BUS LEVELS GUARANTEED AT 24 mA s BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL s OPERATING VOLTAGE RANGE: VCC(OPR) = 2.0V to 3.6V (1.5V Data Retention) s PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 240 s LATCH-UP PERFORMANCE EXCEEDS 500mA (JESD 17) s ESD PERFORMANCE: HBM > 2000V (MIL STD 883 method 3015); MM > 200V DESCRIPTION The 74LCX240 is a low voltage CMOS OCTAL BUS BUFFER fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. It is ideal for low power and high speed 3.3V applications; it can be interfaced to 5V signal environment for both inputs and outputs. It has same speed performance at 3.3V than 5V AC/ACT family, combined with a lower power consumption. This device is designed to be used with 3 state memory address drivers, etc. All inputs and outputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage. 74LCX240 LOW VOLTAGE CMOS OCTAL BUS BUFFER (3-STATE INV.) WITH 5V TOLERANT INPUTS AND OUTPUTS Figure 1: Pin Connection And IEC Logic Symbols Table 1: Order Codes PACKAGE T & R SOP 74LCX240MTR TSSOP 74LCX240TTR TSSOP SOP Rev. 6 |
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