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STD6NF10 Scheda tecnica(PDF) 1 Page - STMicroelectronics |
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STD6NF10 Scheda tecnica(HTML) 1 Page - STMicroelectronics |
1 / 9 page 1/9 June 2001 . STD6NF10 N-CHANNEL 100V - 0.22 Ω - 6A IPAK/DPAK LOW GATE CHARGE STripFET™ POWER MOSFET s TYPICAL RDS(on) = 0.22 Ω s EXCEPTIONAL dv/dt CAPABILITY s 100% AVALANCHE TESTED s LOW THRESHOLD DRIVE s THROUGH-HOLE IPAK (TO-251) POWER PACKAGE IN TUBE (SUFFIX “-1") s SURFACE-MOUNTING DPAK (TO-252) POWER PACKAGE IN TAPE & REEL (SUFFIX “T4") DESCRIPTION This MOSFET series realized with STMicroelectronics unique STripFET process has specifically been designed to minimize input capacitance and gate charge. It is therefore suitable as primary switch in advanced high- efficiency, high-frequency isolated DC-DC converters for Telecom and Computer applications. It is also intended for any applications with low gate drive requirements. APPLICATIONS s HIGH-EFFICIENCY DC-DC CONVERTERS s UPS AND MOTOR CONTROL TYPE VDSS RDS(on) ID STD6NF10 100 V <0.250 Ω 6 A 3 2 1 1 3 IPAK TO-251 (Suffix “-1”) DPAK TO-252 (Suffix “T4”) ABSOLUTE MAXIMUM RATINGS (•) Pulse width limited by safe operating area. (1) ISD ≤6A, di/dt ≤300A/µs, VDD ≤ V(BR)DSS, Tj ≤ TJMAX (2) Starting Tj = 25 oC, ID = 3A, VDD= 50V Symbol Parameter Value Unit VDS Drain-source Voltage (VGS = 0) 100 V VDGR Drain-gate Voltage (RGS = 20 kΩ) 100 V VGS Gate- source Voltage ± 20 V ID Drain Current (continuos) at TC = 25°C 6A ID Drain Current (continuos) at TC = 100°C 4A IDM(•) Drain Current (pulsed) 24 A Ptot Total Dissipation at TC = 25°C 30 W Derating Factor 0.2 W/°C dv/dt (1) Peak Diode Recovery voltage slope 40 V/ns EAS (2) Single Pulse Avalanche Energy 200 mJ Tstg Storage Temperature -65 to 175 °C Tj Max. Operating Junction Temperature INTERNAL SCHEMATIC DIAGRAM |
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