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SN74ABT16657DLRG4 Scheda tecnica(PDF) 7 Page - Texas Instruments |
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SN74ABT16657DLRG4 Scheda tecnica(HTML) 7 Page - Texas Instruments |
7 / 12 page SN54ABT16657, SN74ABT16657 16-BIT TRANSCEIVERS WITH PARITY GENERATORS/CHECKERS AND 3-STATE OUTPUTS SCBS103B – FEBRUARY 1992 – REVISED JANUARY 1997 7 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 switching characteristics over recommended ranges of supply voltage and operating free-air temperature, CL = 50 pF (unless otherwise noted) (see Figure 1) PARAMETER FROM (INPUT) TO (OUTPUT) VCC = 5 V, TA = 25°C SN54ABT16657 SN74ABT16657 UNIT (INPUT) (OUTPUT) MIN TYP MAX MIN MAX MIN MAX tPLH AorB BorA 1.5 2.5 3.3 1.5 4.2 1.5 4.1 ns tPHL A or B B or A 2 3.1 3.9 2 4.5 2 4.3 ns tPLH A PARITY 2 4.6 5.4 2 7 2 6.7 ns tPHL A PARITY 2 4.3 5.1 2 6.5 2 6.1 ns tPLH ODD/EVEN PARITY ERR 2 4.6 5.4 2 7 2 6.7 ns tPHL ODD/EVEN PARITY, ERR 2 4.3 5.1 2 6.5 2 6.1 ns tPLH B ERR 2 4.6 5.4 2 7 2 6.7 ns tPHL B ERR 2 4.3 5.1 2 6.5 2 6.1 ns tPLH PARITY ERR 2 4.6 5.4 2 7 2 6.7 ns tPHL PARITY ERR 2 4.3 5.1 2 6.5 2 6.1 ns tPZH OE AorB 2 3.9 4.9 2 5.8 2 5.6 ns tPZL OE A or B 2.5 4.3 5.1 2.5 6.2 2.5 6 ns tPHZ OE AorB 2 3.6 4.5 2 5.5 2 5.4 ns tPLZ OE A or B 1.5 3 3.8 1.5 4.7 1.5 4.3 ns tPZH OE PARITY ERR 2 4 4.9 2 5.8 2 5.6 ns tPZL OE PARITY, ERR 2.5 4.1 5.1 2.5 6.2 2.5 6 ns tPHZ OE PARITY ERR 1 3.5 4.5 1 5.5 1 5.4 ns tPLZ OE PARITY, ERR 1.5 3 3.8 1.5 4.7 1.5 4.3 ns PRODUCT PREVIEW information concerns products in the formative or design phase of development. Characteristic data and other specifications are design goals. Texas Instruments reserves the right to change or discontinue these products without notice. |
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