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KMPC860PZQ66D4 Scheda tecnica(PDF) 2 Page - Freescale Semiconductor, Inc |
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KMPC860PZQ66D4 Scheda tecnica(HTML) 2 Page - Freescale Semiconductor, Inc |
2 / 80 page MPC860 PowerQUICC™ Family Hardware Specifications, Rev. 8 2 Freescale Semiconductor Overview 1Overview The MPC860 power quad integrated communications controller (PowerQUICC™) is a versatile one-chip integrated microprocessor and peripheral combination designed for a variety of controller applications. It particularly excels in communications and networking systems. The PowerQUICC unit is referred to as the MPC860 in this hardware specification. The MPC860 implements Power Architecture™ technology and contains a superset of Freescale’s MC68360 quad integrated communications controller (QUICC), referred to here as the QUICC, RISC communications proccessor module (CPM). The CPU on the MPC860 is a 32-bit core built on Power Architecture technology that incorporates memory management units (MMUs) and instruction and data caches.. The CPM from the MC68360 QUICC has been enhanced by the addition of the inter-integrated controller (I2C) channel. The memory controller has been enhanced, enabling the MPC860 to support any type of memory, including high-performance memories and new types of DRAMs. A PCMCIA socket controller supports up to two sockets. A real-time clock has also been integrated. Table 1 shows the functionality supported by the MPC860 family. Table 1. MPC860 Family Functionality Part Cache (Kbytes) Ethernet ATM SCC Reference1 1 Supporting documentation for these devices refers to the following: 1. MPC860 PowerQUICC Family User’s Manual (MPC860UM, Rev. 3) 2. MPC855T User’s Manual (MPC855TUM, Rev. 1) Instruction Cache Data Cache 10T 10/100 MPC860DE 4 4 Up to 2 — — 2 1 MPC860DT 4 4 Up to 2 1 Yes 2 1 MPC860DP 16 8 Up to 2 1 Yes 2 1 MPC860EN 4 4 Up to 4 — — 4 1 MPC860SR 4 4 Up to 4 — Yes 4 1 MPC860T 4 4 Up to 4 1 Yes 4 1 MPC860P 16 8 Up to 4 1 Yes 4 1 MPC855T 4411 Yes 1 2 |
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