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CAT28C512PI15T Scheda tecnica(PDF) 3 Page - Catalyst Semiconductor |
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CAT28C512PI15T Scheda tecnica(HTML) 3 Page - Catalyst Semiconductor |
3 / 11 page CAT28C512/513 3 Doc. No. 1007, Rev . A D.C. OPERATING CHARACTERISTICS VCC = 5V ±10%, unless otherwise specified. Limits Symbol Parameter Min Typ Max. Units Test Conditions ICC VCC Current (Operating, TTL) 50 mA CE = OE = VIL, f=6MHz All I/O’s Open ICCC(5) VCC Current (Operating, CMOS) 25 mA CE = OE = VILC, f=6MHz All I/O’s Open ISB VCC Current (Standby, TTL) 3 mA CE = VIH, All I/O’s Open ISBC(6) VCC Current (Standby, CMOS) 200 µA CE = VIHC, All I/O’s Open ILI Input Leakage Current -10 10 µAVIN = GND to VCC ILO Output Leakage Current -10 10 µAVOUT = GND to VCC, CE = VIH VIH(6) High Level Input Voltage 2 VCC +0.3 V VIL(5) Low Level Input Voltage -1 0.8 V VOH High Level Output Voltage 2.4 V IOH = –400 µA VOL Low Level Output Voltage 0.4 V IOL = 2.1mA VWI Write Inhibit Voltage 3.5 V *COMMENT Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions outside of those listed in the operational sections of this specifica- tion is not implied. Exposure to any absolute maximum rating for extended periods may affect device perfor- mance and reliability. ABSOLUTE MAXIMUM RATINGS* Temperature Under Bias ................. –55 °C to +125°C Storage Temperature ....................... –65 °C to +150°C Voltage on Any Pin with Respect to Ground(2) ........... –2.0V to +VCC + 2.0V VCC with Respect to Ground ............... –2.0V to +7.0V Package Power Dissipation Capability (Ta = 25 °C)................................... 1.0W Lead Soldering Temperature (10 secs) ............ 300 °C Output Short Circuit Current(3) ........................ 100 mA RELIABILITY CHARACTERISTICS Symbol Parameter Min Max. Units Test Method NEND(1) Endurance 100,000 Cycles/Byte MIL-STD-883, Test Method 1033 TDR(1) Data Retention 100 Years MIL-STD-883, Test Method 1008 VZAP(1) ESD Susceptibility 2000 Volts MIL-STD-883, Test Method 3015 ILTH(1)(4) Latch-Up 100 mA JEDEC Standard 17 Note: (1) This parameter is tested initially and after a design or process change that affects the parameter. (2) The minimum DC input voltage is –0.5V. During transitions, inputs may undershoot to –2.0V for periods of less than 20 ns. Maximum DC voltage on output pins is VCC +0.5V, which may overshoot to VCC +2.0V for periods of less than 20 ns. (3) Output shorted for no more than one second. No more than one output shorted at a time. (4) Latch-up protection is provided for stresses up to 100mA on address and data pins from –1V to VCC +1V. (5) VILC = –0.3V to +0.3V. (6) VIHC = VCC –0.3V to VCC +0.3V. |
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