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M27V256-120K6TR Scheda tecnica(PDF) 6 Page - STMicroelectronics

Il numero della parte M27V256-120K6TR
Spiegazioni elettronici  256 Kbit (32Kb x 8) Low Voltage UV EPROM and OTP EPROM
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Produttore elettronici  STMICROELECTRONICS [STMicroelectronics]
Homepage  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

M27V256-120K6TR Scheda tecnica(HTML) 6 Page - STMicroelectronics

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M27V256
6/15
Figure 5. Read Mode AC Waveforms
AI00758B
tAXQX
tEHQZ
A0-A14
E
G
Q0-Q7
tAVQV
tGHQZ
tGLQV
tELQV
VALID
Hi-Z
VALID
Table 8B. Read Mode AC Characteristics (1)
(TA = 0 to 70°C or –40 to 85 °C; VCC = 3.3V ± 10%; VPP = Vcc)
Note: 1. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP.
2. Sampled only, not 100% tested.
Symbol
Alt
Parameter
Test Condition
M27V256
Unit
-120
-150
-200
Min
Max
Min
Max
Min
Max
tAVQV
tACC Address Valid to Output Valid
E= VIL,G = VIL
120
150
200
ns
tELQV
tCE
Chip Enable Low to Output
Valid
G= VIL
120
150
200
ns
tGLQV
tOE
Output Enable Low to Output
Valid
E=VIL
45
50
60
ns
tEHQZ
(2)
tDF
Chip Enable High to Output
Hi-Z
G= VIL
035
0
40
050
ns
tGHQZ
(2)
tDF
Output Enable High to Output
Hi-Z
E=VIL
035
0
40
050
ns
tAXQX
tOH
Address Transition to Output
Transition
E = VIL, G = VIL
0
0
0
ns
Programming
The M27V256 has been designed to be fully com-
patible with the M27C256B and has the same
electronic signature. As a result the M27V256 can
be programmed as the M27C256B on the same
programming equipments applying 12.75V on VPP
and 6.25V on VCC by the use of the same PRES-
TO II algorithm. When delivered (and after each
erasure for UV EPROM), all bits of the M27V256
are in the ’1’ state. Data is introduced by selective-
ly programming ’0’s into the desired bit locations.
Although only ’0’s will be programmed, both ’1’s
and ’0’s can be present in the data word. The only
way to change a ’0’ to a ’1’ is by die exposition to
ultraviolet light (UV EPROM). The M27V256 is in
the programming mode when VPP input is at
12.75V, G is at VIH and E is pulsed to VIL. The data
to be programmed is applied to 8 bits in parallel to
the data output pins. The levels required for the
address and data inputs are TTL. VCC is specified
to be 6.25 V
± 0.25 V.


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