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M27W256-150K6TR Scheda tecnica(PDF) 8 Page - STMicroelectronics

Il numero della parte M27W256-150K6TR
Spiegazioni elettronici  256 Kbit 32Kb x 8 Low Voltage UV EPROM and OTP EPROM
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Produttore elettronici  STMICROELECTRONICS [STMicroelectronics]
Homepage  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

M27W256-150K6TR Scheda tecnica(HTML) 8 Page - STMicroelectronics

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PRESTO II Programming Algorithm
PRESTO II Programming Algorithm allows to pro-
gram the whole array with a guaranteed margin, in
a typical time of 3.5 seconds. Programming with
PRESTO II involves the application of a sequence
of 100
µs program pulses to each byte until a cor-
rect verify occurs (see Figure 7). During program-
ming and verify operation, a MARGIN MODE
circuit is automatically activated in order to guar-
antee that each cell is programmed with enough
margin. No overprogram pulse is applied since the
verify in MARGIN MODE at VCC much higher than
3.6V provides necessary margin to each pro-
grammed cell.
Program Inhibit
Programming of multiple M27W256s in parallel
with different data is also easily accomplished. Ex-
cept for E, all like inputs including G of the parallel
M27W256 may be common. A TTL low level pulse
applied to a M27W256’s E input, with VPP at 12.75
V, will program that M27W256. A high level E input
inhibits the other M27W256s from being pro-
grammed.
Program Verify
A verify (read) should be performed on the pro-
grammed bits to determine that they were correct-
ly programmed. The verify is accomplished with G
at VIL, E at VIH,VPP at 12.75V and VCC at 6.25V.
Figure 6. Programming and Verify Modes AC Waveforms
tAVEL
VALID
AI00759
A0-A14
Q0-Q7
VPP
VCC
G
DATA IN
DATA OUT
E
tQVEL
tVPHEL
tVCHEL
tEHQX
tELEH
tGLQV
tQXGL
tGHQZ
tGHAX
PROGRAM
VERIFY
Figure 7. Programming Flowchart
AI00707D
n= 0
Last
Addr
VERIFY
P = 100
µs Pulse
++n
=25
++ Addr
VCC = 6.25V, VPP = 12.75V
FAIL
CHECK ALL WORDS
1st: VCC =5V
2nd: VCC = 2.7V
YES
NO
YES
NO
YES
NO


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