PWM OPERATION

While in PWM (Pulse Width Modulation) mode, the output

voltage is regulated by switching at a constant frequency

and then modulating the energy per cycle to control power to

the load. Energy per cycle is set by modulating the PFET

switch on-time pulse-width to control the peak inductor cur-

rent. This is done by comparing the signal from the current-

sense amplifier with a slope compensated error signal from

the voltage-feedback error amplifier. At the beginning of

each cycle, the clock turns on the PFET switch, causing the

inductor current to ramp up. When the current sense signal

ramps past the error amplifier signal, the PWM comparator

turns off the PFET switch and turns on the NFET synchro-

nous rectifier, ending the first part of the cycle. If an increase

in load pulls the output voltage down, the error amplifier

output increases, which allows the inductor current to ramp

higher before the comparator turns off the PFET. This in-

creases the average current sent to the output and adjusts

for the increase in the load.

Before going to the PWM comparator, the error signal is

summed with a slope compensation ramp from the oscillator

for stability of the current feedback loop. During the second

part of the cycle, a zero crossing detector turns off the NFET

synchronous rectifier if the inductor current ramps to zero.

The minimum on time of the PFET in PWM mode is about

200ns.

20057407

FIGURE 5. Simplified Functional Diagram

PWM Mode Switching Waveform

20057425

A: Inductor Current, 500mA/div

B: SW Pin, 2V/div

FIGURE 6.

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