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ADCS9888 Scheda tecnica(PDF) 11 Page - National Semiconductor (TI) |
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ADCS9888 Scheda tecnica(HTML) 11 Page - National Semiconductor (TI) |
11 / 34 page Analog Channel Characteristics (Continued) 20062804 Note 8: Typical figures are at TJ =TA = 25˚C, with the ADC Clock at the stated speed, and represent most likely parametric norm. Note 9: Test limits are guaranteed to National’s AOQL (Average Outgoing Quality Level). Note 10: Full channel integral non-linearity error is defined as the deviation of the analog value, expressed in LSBs from the straight line that best fits the actual transfer function of the AFE. Note 11: The output supply current (IDD) includes the power required to drive a typical digital bus and load circuit at the stated test frequency. The actual output supply current will depend on the load capacitance of the printed circuit board and connected load device, and the operating frequency and output mode in the application. Note 12: These values are guaranteed by design and characterization testing. www.national.com 11 |
Codice articolo simile - ADCS9888_05 |
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Descrizione simile - ADCS9888_05 |
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