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HCF4536BC1 Scheda tecnica(PDF) 2 Page - STMicroelectronics

Il numero della parte HCF4536BC1
Spiegazioni elettronici  PROGRAMMABLE TIMER
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Produttore elettronici  STMICROELECTRONICS [STMicroelectronics]
Homepage  http://www.st.com
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FUNCTIONAL DIAGRAM
ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
Value
Unit
V DD*
Supply Voltage : HCC Types
HCF Types
– 0.5 to + 20
– 0.5 to + 18
V
V
Vi
Input Voltage
– 0.5 to VDD + 0.5
V
I I
DC Input Current (any one input)
± 10
mA
Pto t
Total Power Dissipation (per package)
Dissipation per Output Transistor
for Top = Full Package-temperature Range
200
100
mW
mW
T op
Operating Temperature : HCC Types
HCF Types
– 55 to + 125
–40 to + 85
°C
°C
T stg
Storage Temperature
– 65 to + 150
°C
Stresses above those listed under ”Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and
functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not
implied. Exposure to absolute maximum rating conditions for external periods may affect device reliability.
* All voltages are with respect to VSS (GND).
Input IN1 serves as either the external clock input or
the input to the on-chip RC oscillator. OUT1 and
OUT2 are connection terminals for the external RC
components. In addition, an on-chip monostable cir-
cuit is provided to allow a variable pulse width out-
put. Various timing functions can be achieved using
combinations of these capabilities. A logic 1 on the
8-BYPASS input enables a bypass of the first 8 sta-
ges and makes stage 9 the first counter stage of the
last 16 stages. Selection of 1 of 16 outputs is accom-
plished by the decoder and the BCD inputs A, B, C
and D. MONO IN is the timing input for the on-chip
monostable oscillator. Grounding of the MONO IN
terminal through a resistor of 10K
Ω or higher, disa-
bles the one-shot circuit and connects the decoder
directly to the DECODE OUT terminal. A resistor to
VDD and a capacitor to ground from the MONO IN
terminal enables the one-shot circuit and controls its
pulse width. A fast test mode is enabled by a logic
1 on 8-BYPASS, SET, and RESET. This mode di-
vides the 24-stage counter into three 8-stage sec-
tions to facilitate a fast test sequence.
HCC/HCF4536B
2/17


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