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HCF40103B Scheda tecnica(PDF) 8 Page - STMicroelectronics |
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HCF40103B Scheda tecnica(HTML) 8 Page - STMicroelectronics |
8 / 13 page TYPICAL APPLICATIONS Divide-by-”N” Counter. Programmable Timer. Microprocessor Interrupt Timer. Microprocessor Interrupt Timer. Synchronous Cascading. * An output spike (160ns @ VDD = 5V) occurs whenever two or more devices are cascaded in the parallel-clocked mode be- cause the clock-to-carry out delay is greater than the carry-in-to- carry out delay. This spike is eliminated by gating the out put of the last device with the clock as shown. HCC/HCF40102B/40103B 8/13 |
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