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ST7PLITES2Y0M6TR Scheda tecnica(PDF) 9 Page - STMicroelectronics |
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ST7PLITES2Y0M6TR Scheda tecnica(HTML) 9 Page - STMicroelectronics |
9 / 124 page ST7LITE0xY0, ST7LITESxY0 9/124 3 REGISTER & MEMORY MAP As shown in Figure 4 and Figure 5, the MCU is ca- pable of addressing 64K bytes of memories and I/ O registers. The available memory locations consist of up to 128 bytes of register locations, 128 bytes of RAM, 128 bytes of data EEPROM and up to 1.5 Kbytes of user program memory. The RAM space in- cludes up to 64 bytes for the stack from 0C0h to 0FFh. The highest address bytes contain the user reset and interrupt vectors. The size of Flash Sector 0 is configurable by Op- tion byte. IMPORTANT: Memory locations marked as “Re- served” must never be accessed. Accessing a re- served area can have unpredictable effects on the device. Figure 4. Memory Map (ST7LITE0x) 0000h RAM Flash Memory (1.5K) Interrupt & Reset Vectors HW Registers 0080h 007Fh 0FFFh (see Table 2) 1000h 107Fh FFE0h FFFFh (see Table 6) 0100h Reserved 00FFh Short Addressing RAM (zero page) 64 Bytes Stack 00C0h 00FFh 0080h 00BFh (128 Bytes) Data EEPROM (128 Bytes) FA00h 1080h F9FFh Reserved FFDFh 1 Kbytes 0.5 Kbytes SECTOR 1 SECTOR 0 1.5K FLASH FFFFh FC00h FBFFh FA00h PROGRAM MEMORY 1000h 1001h RCCR0 RCCR1 see section 7.1 on page 24 FFDEh FFDFh RCCR0 RCCR1 see section 7.1 on page 24 1 |
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