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TA1218ANG Scheda tecnica(PDF) 9 Page - Toshiba Semiconductor |
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TA1218ANG Scheda tecnica(HTML) 9 Page - Toshiba Semiconductor |
9 / 40 page TA1218ANG 2005-11-15 9 Pin No. Name Function Interface 21 I/O3 This is an ADC input/DAC output pin. The ADC is a 2-level detection type (1 bit). The threshold level is 2.25 V. The DAC (1 bit) is an open-collector output. Make sure that the current flowing into this pin is 2.0 mA or less. 22 O4 This pin is for a 1 bit DAC output. This is an open-collector output. Make sure that the current flowing into this pin is 2.0 mA or less. 23 GND This is the GND pin. ⎯ 24 SCL This pin is for input an I 2 C bus clock. The input threshold level of this pin is 2.25 V. 25 SDA This is an I 2 C bus data input/output pin. The input threshold level of this pin is 2.25 V. Make sure that the current flowing into this pin is 3.0 mA or less. 21 Logic 22 Logic 24 Logic Surge protection circuit 25 Logic Surge protection circuit |
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