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TA48LS00F Scheda tecnica(PDF) 2 Page - Toshiba Semiconductor |
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TA48LS00F Scheda tecnica(HTML) 2 Page - Toshiba Semiconductor |
2 / 9 page TA48LS00F 2007-06-22 2 Pin Description Pin No. Symbol Description 1 N.C. Non-connection 2~4 GND Ground terminal 5 IN Input terminal. Connected by capacitor (CIN) to GND. 6 EN Output ON/OFF control terminal. Output is ON when this pin is set to “High”, OFF when this pin is open or set to “Low”. 7 ADJ Output voltage feedback to regulator. It is connected to an error amplifier with VREF=1.238 V (Typ.). 8 OUT Output terminal. Connected by capacitor (COUT) to GND. How to Order Product No. Package Type and Capacity TA48LS00F(TE85L, F) Tape (3000 pcs/reel) Block Diagram GND ON/OFF function Over temperature protection Over current protection Control circuit EN IN OUT Reference voltage ADJ 1.238 V (Typ.) |
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