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TC74HC4049AF Scheda tecnica(PDF) 1 Page - Toshiba Semiconductor |
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TC74HC4049AF Scheda tecnica(HTML) 1 Page - Toshiba Semiconductor |
1 / 9 page TC74HC4049,4050AP/AF/AFN/AFT 2007-10-01 1 TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC74HC4049AP,TC74HC4049AF,TC74HC4049AFN,TC74HC4049AFT TC74HC4050AP,TC74HC4050AF,TC74HC4050AFN,TC74HC4050AFT TC74HC4049AP/AF/AFN/AFT Hex Buffer/Converter (inverting) TC74HC4050AP/AF/AFN/AFT Hex Buffer/Converter The TC74HC4049A and TC74HC4050A are high speed CMOS HEX BUFFERs fabricated with silicon gate C2MOS technology. They achieve the high speed operation similar to equivalent LSTTL while maintaining the CMOS low power dissipation. The TC74HC4049A is an inverting buffer, while the TC74HC4050A is a non-inverting buffer. The internal circuits are composed of 3-stages (HC4049A) or 2-stages (HC4050A) of invertaers, which provided high noise immunity and stable output. Input protection circuits are different from those of other high speed CMOS IC’s. They eliminate the diodes on the VCC side thus providing of logic-level conversion from high-level volages up to 15 V to low-level voltages. They are useful for battery back up circuits, because input voltage can be applied on IC’s which are not biased by VCC. Features • High speed: tpd = 9 ns (typ.) at VCC = 5 V • Low power dissipation: ICC = 1 μA (max) at Ta = 25°C • High noise immunity: VNIH = VNIL = 28% VCC (min) • Output Drive Capability: 15 LSTTL loads • Symmetrical output impedance: |IOH| = IOL = 6 mA (min) • Balanced propagation delays: tpLH ∼− tpHL • Wide operating voltage range: VCC (opr) = 2 V to 6 V • Pin and function compatible with 4049B/4050B Note: xxxFN (JEDEC SOP) is not available in Japan. TC74HC4049AP, TC74HC4050AP TC74HC4049AF, TC74HC4050AF TC74HC4049AFN, TC74HC4050AFN TC74HC4049AFT, TC74HC4050AFT Weight DIP16-P-300-2.54A : 1.00 g (typ.) SOP16-P-300-1.27A : 0.18 g (typ.) SOL16-P-150-1.27 : 0.13 g (typ.) TSSOP16-P-0044-0.65A : 0.06 g (typ.) |
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